Digital Exposure Time Determining System For Cameras

Abstract

An electrical computer circuit for determining exposure time according to a digital system. A series of timing circuits are provided for respectively providing different exposure times according to which of the timing circuits is selected for operation. A particular one of the timing circuits is selected for operation as a result of comparing by suitable comparing circuits an electrical quantity corresponding to exposure time with a plurality of reference electrical quantities, a series of selecting circuits being provided to select from that one of the comparing circuits whose reference electrical quantity is closest to the electrical quantity corresponding to exposure time a signal to be transmitted to a corresponding timing circuit.

Parent Case Text

CROSS REFERENCE TO RELATED APPLICATION

This application is a continuation in part of copending application Ser. No. 259,214, filed June 2, 1972 and entitled SYSTEM FOR INDICATING THE MAGNITUDE OF AN ELECTRICAL QUANTITY.

Description

BACKGROUND OF THE INVENTION

The present invention relates to cameras.

More particularly, the present invention relates to computer systems for automatically computing the exposure time in a camera.

It is conventional with camera computers of this type to provide analog memory operations by way of a capacitor. Thus, in accordance with the photographic factors such as object brightness, selected aperture size, and film speed, the required exposure time is computed and an electrical magnitude corresponding to the required exposure time is stored temporarily at a capacitor, particularly in the case where the intensity of the light is measured internally after the light has traveled through the objective of the camera, as is conventional with certain types of single lens reflex cameras.

With these conventional structures according to which the memory operations are carried out by a capacitor, a low degree of accuracy has been encountered due to current leakage from the capacitor when the storing or memorizing operations are extended over a fairly long period of time. As a result capacitors of large capacity are required in order to achieve the required accuracy. The capacitors which are used for such a purpose therefore have a large size and the time required for the completion of the memory operations is undesirably extended, so that the shutter cannot be actuated as frequently as desired and the usefulness of the camera, including the automatically controlled shutter thereof, is decreased.

SUMMARY OF THE INVENTION

It is accordingly a primary object of the present invention to provide for a camera an exposure time computing system which will avoid these drawbacks.

In particular, it is an object of the invention to provide a system which does not require the storage or memory capacitors which are conventionally used to store information in the form of an electrical quantity which is transmitted to the structure which determines when the shutter will close to terminate an exposure.

Moreover, it is an object of the present invention to provide a structure of this type which does not require the use of meters which are conventionally used and are another source of faulty operation in conventional cameras.

In particular, it is an object of the present invention to provide a computing system capable of operating almost instantaneously so that the time lag involved in the operation of the system itself is reduced to a minimum.

Furthermore, it is an object of the present invention to provide a system which will operate in a digital manner so that the use of meters or the like as is conventional with analog systems can be avoided.

Furthermore, it is an object of the present invention to provide for a system of the above type an indicating arrangement capable of indicating the exposure time to the operator in a highly convenient manner.

In particular, it is an object of the present invention to provide an electrical computing system of the above type which is exceedingly simple and reliable in operation and which at the same time is capable of being accommodated in a relatively small space so that the camera size is not undesirably increased by reason of the structure of the present invention.

In accordance with the invention a light-responsive circuit means is provided for producing an output quantity corresponding to exposure time in accordance with parameters such as the brightness of the light at the object which is to be photographed, the selected exposure aperture size, and the speed of the film which is exposed in the camera.

A plurality of reference circuit means are provided for providing a series of reference electrical quantities which differ one from the next by a given increment. A plurality of comparing circuit means are respectively connected with the reference circuit means for receiving the reference electrical quantities therefrom, and all of these comparing circuit means are connected electrically with the light-responsive circuit means for receiving therefrom the output quantity corresponding to the exposure time. This output quantity is compared at the several comparing circuit means with the different reference electrical quantities received thereby respectively from the plurality of reference circuit means, and a plurality of selecting circuit means are electrically connected with the series of comparing circuit means for determining which one of the latter receives a reference electrical quantity closest to the output quantity which corresponds to exposure time. This one selected comparing circuit means provides a single output at the corresponding one of the selecting circuit means, and this single output is transmitted to one of the series of timing circuit means. The series of timing circuit means respectively are capable of providing different exposure times which differ one from the next by a given increment, and in accordance with the sequential arrangement and interconnection of the several series of circuits the single output from one of the selecting circuit means will trigger a particular one of the timing circuit means which will provide an exposure time corresponding to the electrical quantity determined by the light-responsive circuit means. This one timing circuit means will actuate an exposure terminating circuit means which terminates the exposure of the film after an exposure interval corresponding to the time interval determined by the one timing circuit means which responds to the one signal which is transmitted from one of the plurality of selecting circuit means.

BRIEF DESCRIPTION OF DRAWINGS

The invention is illustrated by way of example in the accompanying drawings which form part of the present application and in which:

FIG. 1 is a schematic block diagram illustrating the entire system of the present invention;

FIG. 2 is a circuit illustrating the light-responsive circuit means of the invention which determines the output electrical quantity corresponding to exposure time;

FIG. 3 is a schematic representation of a plurality of reference circuit means which provides reference electrical quantities;

FIG. 4 is a wiring diagram of a comparing circuit;

FIG. 5 is a diagram of some of the selecting circuits;

FIG. 6 is a diagrammatic illustration of a memory circuit means used when light is measured internally after passing through the camera objective;

FIG. 7 is a schematic representation of an indicator means for indicating the exposure time;

FIG. 8 is a diagrammatic representation of the timing circuit means; and

FIG. 9 is a wiring diagram of the exposure terminating circuit means.

DESCRIPTION OF PREFERRED EMBODIMENTS

Referring to the block diagram of FIG. 1, the light which enters through the objective is measured by a photosensitive light-receiving means 1 while the diaphragm is fully open, and this photosensitive means converts the light electrically into the corresponding electrical quantity in the form of a voltage or current. The signal from the photosensitive means 1 is transmitted to a logarithmic compression section 2 composed, for example, of diodes which convert the incident light, the intensity of which varies according to a geometric progression of two, into a linear electrical signal which is transmitted to a computing amplifying section 3. Computation is carried out in accordance with a photographic formula by use of three different input signals such as the light input signal, the film speed signal, and an F signal according to the selected exposure aperture. The latter two signals are developed in the form of an F.sup.. ASA signal developing section 4 and also transmitted to the computing amplifying section 3.

Of course, all of these operations are carried out according to the Additive System of Photographic Exposure and are almost equal to the first half steps of well-known prior art electrical shutter controlling systems in which this sequence of operational steps such as light measurement, logarithmic compression, computation, logarithmic expansion, and timing are performed in the latter order. In such a controlling system, an analog exposure time is obtained by use of the output signal from this computation.

According to the present invention, however, the output signal from the light-responsive means which includes the components 1-4 is initially quantized by comparing the output quantity with a reference quantity in the form, for example, of a sampling voltage. The quantized signal is then used for selectively operating the required timing circuit so as to develop in this way the exposure time.

With the particular advantage of the invention described below and shown in the drawings there are eleven different exposure times corresponding to 1/1000 sec, 1/500 sec . . . , 1/2 sec. 1/1 sec. A threshold or sampling voltage forms a reference electrical quantity, and a series of these reference electrical quantities are obtained from a series of reference circuits 6 which are arranged in a suitable sequence, eleven such circuits being provided in the illustrated example. Thus, the plurality of reference circuit means 6 operate to develop eleven different electrical quantities in the form of reference voltages which are sequentially arranged so as to differ by equal intervals from one to the next. Each of these voltage levels is applied to a corresponding comparing circuit in the form of a plurality of comparing means 5 which form a series of comparing circuit means electrically connected respectively to and in a corresponding sequence to the series of reference circuit means 6. The output quantity from the computing section 3 of the light-responsive circuit means is in the form of an electrical quantity corresponding to the required exposure time, and this output is applied to all of the comparing circuit means 5 while the latter receive the different reference electrical quantities so that the one output from the light-responsive circuit means is compared with the several reference quantities.

Assuming that the output quantity from light-responsive circuit means, which is proportional to the APEX number T.sub.V of the exposure time, is represented by V.sub.T, then V.sub.T is compared with eleven different reference or threshold voltages V.sub.1, V.sub.2 . . . V.sub.11. The several comparing circuit means 5 are constructed in such a way that those which receive reference voltages less than V.sub.T will provide a logic output 1, while the remaining plurality of comparing circuit means receive reference voltages greater than V.sub.T and will develop a logic output O. In this way the output quantity V.sub.T of the light-responsive circuit means 1-4 is quantized by the use of eleven different reference electrical quantities in the form of the sampling voltages derived from the several reference circuit means 6.

FIG. 2 illustrates the circuitry of the light-responsive means 1-4. Thus, referring to FIG. 2 it will be seen that the light-responsive means is formed by the CdS component forming a cadmium sulfide photoconductive element and responding to the light intensity for providing a corresponding electrical quantity. The exposure aperture size and the film speed are introduced by way of the variable resistor R.sub.F.ASA so that in this way the diaphragm setting and film speed are introduced into the circuitry. The photosensitive means formed by the CdS element electrically converts the incident light into an electrical voltage which varies according to a geometrical progression of two. This varying voltage is applied to a diode group D.sub.1 so as to be logarithmically compressed thereby. The voltage output from the variable resistor R.sub.F.ASA, which varies according to a geometrical progression of two also, is compressed logarithmically by a second diode group D.sub.2. These logarithmically compressed voltages from the diode groups D.sub.1 and D.sub.2 are applied simultaneously to a differential amplifying computations circuit so as to attain the output quantity V.sub.T, at the terminal 13, corresponding to the required exposure time.

FIG. 3 illustrates a simple series of reference circuit means used to develop the several threshold voltages. Referring to FIG. 3, there are connected in series a plurality of resistors which have equal resistances. The battery 15 forms the voltage source connected in series with the series connected resistors 14. The plurality of terminals 5-1, 5-2, . . . 5-11 are adapted to apply a constant biasing input to the several comparing circuit means, respectively.

FIG. 4 illustrates one of the comparing circuit means by way of example. Thus, the series of comparing circuit means are each composed of circuitry as illustrated in FIG. 4. Each comparing circuit has an input terminal 17 and the several input terminals 17 of the several comparing circuit means 5 are respectively connected electrically with the several output terminals 5-1, 5-2 . . . 5-11 of the sequential series of reference circuit means 6. On the other hand, the eleven comparing circuit means 5 respectively have second input terminals 16 all of which are connected electrically to the output terminal 13 of the light-responsive circuit means which is illustrated in FIG. 2. Thus, all of the input terminals 16 are connected to a common input terminal 13. Depending upon whether V.sub.T is larger or smaller than V.sub.X, which represents the reference voltage derived from each of the reference circuit means 6, either a logic output 1 or a logic output 0 is developed at the several output terminals 18 of the eleven comparing circuit means.

The sequential series of comparing means 5 are respectively connected electrically with a sequential series of selecting circuit means 7. The series of selective circuit means 7 shown in FIG. 1 operate to select from the several comparing circuits which provide the logic output 1 a specific comparing circuit which is biased by the highest reference voltage less than the threshold voltage. The several selecting circuit means which respond only to the several comparing circuit means which provide the logic output 1 select from the latter group only that one comparing circuit which receives a reference quantity in the form of a threshold voltage which is closest to the computed output quantity V.sub.T.

FIG. 5 illustrates the construction of the plurality of selecting circuit means 7. Each individual selecting circuit means includes a combination of a NOT gate 19 and an AND gate 20. The plurality of selecting circuit means 7 are connected electrically to the outputs 18 of the plurality of comparing circuit means 5. As will be seen from FIG. 5, the NOT gate of each selecting circuit means 7 receives the output from the terminal 18 of a corresponding comparing circuit means 5, while the AND gate 20 receives the output from the terminal 18 of the next comparing circuit means 5, and in this way that one of the selecting circuit means which is situated at the transition between the plurality of comparing circuits which receive reference voltages less than the voltage V.sub.T and the group which receive reference voltages greater than the voltage V.sub.T is detected so that a corresponding selection is made. Thus, only one selecting circuit of the plurality of selecting circuit means 7 will develop a logic output 1, while all of the other selecting circuits develop a logic output 0. As a result one subsequent circuit will receive the logic output 1 to be excited thereby.

In the above example it is assumed that the photosensitive means CdS is an internal photosensitive means situated in the interior of the camera to receive light after it has traveled through the objective of the camera. With a camera of this type it is necessary to provide a plurality of memory circuit means 8 so that even after the quick-return mirror of the camera has been swung up by depressing the shutter-release button and the leading curtain has started to run so as to start the exposure and terminate the receiving of light by the photosensitive means, the memory circuit means operates in such a way that it will retain the computed output quantity V.sub.T corresponding to the light value which is measured immediately before release of the shutter. Also, the logic output 1 obtained from one of the selecting circuit means by quantizing with respect to the computation output quantity V.sub.T is retained at least until the trailing shutter curtain starts to run down so as to terminate the exposure.

FIG. 6 illustrates details of the memory circuit means. The memory circuit illustrated in FIG. 6 includes a combination of memory switch 21, a NOT gate 22, and a NAND gate 23. During light measuring operations when the shutter is cocked, the memory switch 21 is maintained in an open state so that logic output 1 from the selecting circuit means can be transmitted at any time to a series of indicating circuit means 10 one of which is energized to indicate the exposure time. Depending upon the variation of the output quantity V.sub.T, the selecting circuit which develops the logic output also changes with the result that there is a variation in the indication of exposure time at the plurality of indicating circuit means 10.

When the shutter is released to make an exposure, the memory switch 21 closes simultaneously and the series of memory circuit means 8 operate in such a way that only that one of the memory circuits which receives the logic input 1 from one of the selecting circuit means transfers the logic output 1 to a subsequent stage formed by the plurality of timing circuit means 9 referred to below. In this way each memory circuit means 8 maintains the same state as at the time immediately before interruption of the light input, even though there has been an interruption in the light input to the photosensitive means CdS. At the same time, it is possible through the memory circuit means to transmit a signal to one of a series of indicating circuit means 10 for indicating at the latter the exposure time while only one of the timing circuit means 9 is selected for operation, each of the timing circuit means 9 being composed, for example, of a capacitor and resistor, although actually there is one capacitor used in common with the plurality of resistors of the several timing circuits, as will be apparent from the description below.

Referring to FIG. 7, a simple construction for each of the several indicating circuit means 10 is illustrated therein. Thus, the output from the eleven memory circuits 8 are capable of being applied respectively to the corresponding base of eleven transistors of the several indicating circuit means which respectively include lamps L.sub.1, L.sub.2 . . . L.sub.11 which are correspondingly illuminated, depending upon which one of the indicating circuit means receives the signal. Inasmuch as only one memory circuit means among the entire series operates, the particular indicating circuit means is electrically active therewith, only one of the eleven indicating lamps is turned on. When the memory switch 21 is in its open condition, one of the lamps L.sub.1, L.sub.2, . . . L.sub.11 is selectively illuminated depending upon the variation in the light input, and accordingly, a suitable exposure time can be recognized by observation of the indicating lamps. Thus, these lamps will be arranged in a series according to which the position of the illuminated lamp in the series will be indicative of the exposure time.

FIG. 8 illustrates the structure of the plurality of timing circuit means 9. The several timing circuit means 9 respectively include the resistors R.sub.1, R.sub.2 . . . R.sub.11 all connected respectively at one of their ends to eleven switching transistors, at the collector terminals of the latter, as illustrated in FIG. 8. All of the resistors are connected at their other ends to a common timing capacitor C so as to form an RC integrating circuit therewith.

The timing switch 24, which bridges the capacitor C and which is opened at precisely the same instant that the leading curtain runs to start the exposure, by depression of the shutter-releasing button, and the RC integrating circuit composed of one of the resistors and the capacitor C starts the charging of the capacitor C. The several magnitudes of the resistors R.sub.1, R.sub.2 . . . R.sub.11 are selected with the magnitude of the capacitor C in such a way that the time period, starting from the initiation of the charging operation for the capacitor C and terminating at a time when the terminal voltage therof reaches a predetermined value becomes a suitable exposure time, and the charging of the capacitor C of this predetermined value results in deenergizing of an electromagnet 25 (FIG. 9) which retains the trailing curtain in its cocked position ready to run down and terminate the exposure upon deenergizing the electromagnet 25. Thus, the electromagnet 25 releases the trailing curtain to terminate the exposure when the capacitor C is charged to a predetermined extent, and thus the circuitry of FIG. 9 forms the exposure-terminating circuit means 11 shown in FIG. 1. As may be seen from FIG. 9 the terminal voltage of the capacitor C is applied to a Schmidt circuit as illustrated in FIG. 9 to trigger the deenergizing of the electromagnet 25 when the charge on the capacitor C at FIG. 8 reaches a given magnitude.

It is thus apparent that with the structure of the invention the exposure time is digitally computed in that only one of a series of discreet predetermined exposure times will be provided in accordance with which of the resistors R.sub.1 . . . R.sub.11 receives the one signal which is transmitted through one of the memory circuit means 8 from one of the selecting circuit means 7. The sequentially arranged timing circuit means 9 are respectively connected electrically with the sequentially arranged memory circuit means 8 which in turn are sequentially connected with the series of selecting circuit means 7 in such a way that only that one output signal which is delivered by one of the selecting circuit means 7, as referred to above, will be transmitted so as to trigger in this way only one of the resistors of the several timing circuit means to bring about a corresponding predetermined exposure time which of course is very close to the exposure time called for by the output quantity V.sub.T provided by the light-responsive circuit means shown in FIG. 2 and formed by the components 1-4 of FIG. 1.

Although the invention has been described above in connection with a particular embodiment where one of eleven different magnitudes of exposure time is selected, it is possible to provide a more finely graded suitable exposure time by increasing the number of gradations or in other words the number of discreet circuits which determine the exposure time in a digital manner. The increase in the number of gradations of course leads to an increase in the number of circuit components. However, due to the modern development in the field of integrated circuit techniques, it is an extremely simple matter to form such circuits as single chips, so that the size of the entire circuitry can be maintained extremely small.

Many advantages are acheived with the present invention. Thus, according to the present invention the photographic parameters are first computed photographically and then quantized, so that there is no analog memory operation by means of a capacitor or the like as is required with previously known techniques using a through-the-lens type of single lens reflex camera. With these conventional operations, the accuracy of the memorizing phase by means of a capacitor has been extremely low due to the current leakage from the capacitor when the memorizing operation is extended over a fairly long period of time. As a result, capacitors must have a large capacity in order to achieve the required accuracy. Therefore, the capacitors which are used become large and the time required for completing the memorizing operations is extended so that the shutter cannot be released very frequently, and the usefulness of the camera including the automatically controlled shutter thereof is decreased.

According to the present invention, however, the memorizing operation requires no time duration whatsoever. This is of extremely great advantage to the operation of the automatically controlled shutter. In addition, the exposure time is indicated by a digital indicator rather than a meter as is required with the prior art devices, so that any mechanical disorders which are conventionally encountered with meters are completely avoided with the present invention. By using luminescent diodes rather than conventional indicating lamps, the indicator means of the invention will have an almost limitless operating life. Thus, the exposure time controlling circuit including the indicator means constructed in accordance with the present invention is highly reliable and will not encounter any operation failures.

In addition, it is possible to provide the principles of the present invention not only to TTL (through-the-lens) single lens reflex cameras where the light is measured after traveling through the objective but also to cameras where the light is measured externally by a photosensitive means which is situated adjacent the objective to receive light at the exterior of the latter rather than light which passes through the objective. With a construction of this latter type it is possible to omit the plurality of memory circuit means 8 shown in FIG. 1, so that in this case the plurality of indicating circuit means 10 are connected directly to the several selecting circuit means 7, respectively, and the plurality of timing circuit means 9 are connected directly to the plurality of selecting circuit means 7.

Claims

What is claimed is:

1. In a camera, light-responsive means for responding to the factors of object brightness, exposure aperture, and film speed to determine therefrom an electrical output quantity corresponding to exposure time, a series of sequentially arranged reference circuit means for respectively providing D.C. reference electrical quantities which differ in magnitude one from the next by a given increment, a series of comparing circuit means respectively connected electrically with said series of reference circuit means and arranged in the same sequence as the latter for receiving the reference electrical quantities therefrom, all of said comparing circuit means being electrically connected with said light-responsive circuit means for receiving said output quantity therefrom and for comparing said output quantity with all of said D.C. reference electrical quantities, said comparing circuit means producing a first type of output for all said D.C. reference electrical quantities equal to or less than said output quantity and a second type of output for all said D.C. reference electrical quantities greater than said output quantity, a series of selecting circuit means sequentially arranged in the same way as said series of comparing circuit means and respectively connected electrically therewith for respectively receiving inputs therefrom, said series of selecting circuit means being responsive to a transition between said first type of output and said second type of output for providing an output signal at only that one of the selecting circuit means which receives an input from that one of said comparing circuit means which receives a reference electrical quantity closest to said output quantity, a series of timing circuit means sequentially arranged in the same way as said series of selecting circuit means and electrically connected respectively therewith for receiving said output signal at that one of said timing circuit means which is arranged in the sequence thereof at a position corresponding to the position of that one of said selecting circuit means in the sequence of the latter which provides said output signal, said plurality of timing circuit means respectively providing a sequential series of timing signals which differ one from the next by a given increment with the timing signals provided by said series of timing circuit means respectively corresponding sequentially to the sequential series of reference electrical quantities provided by said plurality of reference circuit means so that a timing signal is provided only by that one of said timing circuit means which determines a timing interval corresponding to said output quantity provided by said light-responsive circuit means, and exposure-terminating circuit means electrically connected with all of said timing circuit means to be actuated only by that one of said timing circuit means which receives said output signal for terminating an exposure after an interval corresponding to the output quantity provided by said light-responsive circuit means.

2. The combination of claim 1 and wherein a plurality of sequentially arranged indicating circuit means are respectively connected electrically to said plurality of selecting circuit means in the same sequence as the latter for indicating only at one of said indicating circuit means the exposure time which will be provided.

3. The combination of claim 2 and wherein said plurality of indicating circuit means respectively include a plurality of luminescent diodes one of which is illuminated by said output signal with said luminous diodes being arranged in a sequence which will indicate the exposure time according to the sequential location of that one of said luminous diodes which becomes illuminated.

4. The combination of claim 1 and wherein said light-responsive circuit means includes a photosensitive means for receiving an internal signal object brightness from light which has already passed through an objective of the camera, and a plurality of memory circuit means sequentially arranged with respect to each other in the same way as said sequentially arranged series of selecting circuit means and said sequentially arranged series of timing circuit means, said sequentially arranged series of memory circuit means being respectively connected electrically between said series of selecting circuit means and said series of timing circuit means for retaining the output signal for transmission to one of said timing circuit means.

5. The combination of claim 4 and wherein a series of sequentially arranged indicating circuit means are respectively connected electrically to said series of sequentially arranged memory circuit means for receiving through the latter a signal corresponding to the selected exposure time which is selected by one of said selecting circuit means and for providing an indication of the selected exposure time.

6. The combination of claim 1 and wherein said series of timing circuit means respectively include a series of resistors the magnitude of which corresponds to the timing signals, a series of switching transistors respectively connected electrically with said resistors and said series of selecting circuit means, and a timing capacitor electrically connected with all of said resistors to be charged according to the magnitude of that one of said resistors which receives said output signal.

7. The combination of claim 1 and wherein each of the selecting circuit means includes an AND gate and a NOT gate, the AND gate receiving as one input the output from its corresponding one of the comparing circuit means, the NOT gate receiving as its input the output from the next successive comparing circuit means, the output from the NOT gate serving as a second input to the AND gate and the output from the AND gate serving as the output from the selecting circuit means.