U.S. patent number 3,656,008 [Application Number 05/005,851] was granted by the patent office on 1972-04-11 for gate circuit for electronic musical instruments.
This patent grant is currently assigned to Hitachi, Ltd.. Invention is credited to Yoshiyuki Nakagomi.
United States Patent |
3,656,008 |
Nakagomi |
April 11, 1972 |
GATE CIRCUIT FOR ELECTRONIC MUSICAL INSTRUMENTS
Abstract
A sustaining gate circuit for musical instruments comprising a
differential amplifier stage including a pair of transistors the
emitters of which are connected in common and a constant current
transistor connected to said commonly connected emitters, a key
switch for applying the gating signal to the base of said constant
current transistor, and a time-delay circuit connected in the base
circuit of said constant current transistor for obtaining
sustaining effect in fade-out of the output.
Inventors: |
Nakagomi; Yoshiyuki
(Kodaira-shi, JA) |
Assignee: |
Hitachi, Ltd. (Tokyo,
JA)
|
Family
ID: |
11685210 |
Appl.
No.: |
05/005,851 |
Filed: |
January 26, 1970 |
Foreign Application Priority Data
Current U.S.
Class: |
327/489; 84/702;
330/69; 330/299; 984/322 |
Current CPC
Class: |
G10H
1/057 (20130101) |
Current International
Class: |
G10H
1/057 (20060101); G10h 005/12 () |
Field of
Search: |
;84/1.26,1.13 ;330/69
;307/268,293,244 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Forrer; Donald D.
Assistant Examiner: Dixon; Harold A.
Claims
What is claimed is:
1. A gate circuit comprising:
a pair of active elements each having a first, a second and a third
terminal, the first terminals of the elements being connected in
common, a signal being applied to the second terminal of one of
said pair of active elements, and means for supplying desired bias
voltages to the second and third terminals of the pair of active
elements;
means connected to the third terminal of the other of said pair of
active elements for deriving the signal from the other of said pair
of active elements;
a third active element having a first, a second and a third
terminal, the current path between the first terminal and the third
terminal through the third active element being connected between
the first terminals of the pair of active elements and a common
reference potential;
means for applying a direct current gating signal to said second
terminal of said third active element, said means including a
mechanical switch and a direct current voltage source connected to
the second terminal of said third active element; and
envelope forming circuit means connected to the second terminal of
said third active element for receiving said gating signal.
2. A gate circuit according to claim 1, in which said switch is
coupled to a biasing voltage supplying means providing one of said
desired bias voltages and serving as said direct current voltage
source and said gating signal is supplied from said biasing voltage
supplying means through said switch.
3. A gate circuit according to claim 1, in which said envelope
forming circuit means comprises a diode and a capacitor both
connected to the second terminal of said third active element, said
gate circuit further comprising a fourth active element connected
to said diode in series.
4. A gate circuit according to claim 3, in which said first,
second, third and fourth active elements are bipolar
transistors.
5. A gate circuit comprising:
a first voltage source;
a plurality of differential amplifier means, each comprising a pair
of transistors the emitter electrodes of which are connected in
common and a third transistor having a collector connected to said
emitter electrodes, said plurality of differential amplifier means
being connected to said first voltage source in parallel;
switching means commonly connected to the base electrodes of the
third transistors of said respective amplifier means;
a second voltage source for supplying a biasing voltage to the
respective base electrodes of said third transistors through said
switching means; and a time delay circuit means commonly connected
to the base electrodes of said third transistors and through said
switching means to said second voltage source, said time delay
circuit means comprising a capacitor commonly connected to the base
electrodes of said third transistors, a first diode commonly
connected to the base electrodes of said third transistors so as to
be forwardly biased by said second voltage source, a resistance
connected to said first diode in series, and a fourth transistor
connected to said resistance in series.
6. A gate circuit according to claim 5, in which the base
electrodes of said pair of transistors of said respective amplifier
means are biased by said second voltage source, said gate circuit
further comprising a second diode connected between the base
electrodes of each of said pair of transistors and the base
electrodes of said third transistors so as to be forwardly biased
by said second voltage source.
Description
This invention relates to a gate circuit, and more particularly to
a sustaining gate circuit for use in electronic musical
instruments.
In electronic musical instruments, a desired signal or signals are
selected from the electric signals of various frequencies generated
from tone generators by pressing keys for playing the instrument.
This selection is done through an electronic gate circuit driven by
the mechanical action of pressing keys. Such a gate circuit is
provided for each signal and thus the number thereof becomes vary
large. Therefore, such a gate circuit should have a simple
structure for minimizing the size and enhancing the reliability
thereof. The outputs of respective gate circuits are mixed at the
output to form an electric signal waveform corresponding to a
desired sound and this mixed output is transmitted to a timbre
circuit.
The total noise level at the output of the gate circuit system is
the sum of noise level of the respective gate circuits. Thus, for
minimizing the noise level it is necessary to minimize the leakage
currents of the gate circuits when keys of the musical instrument
are not hit. The signal to noise ratio of the total gate circuit
system depends on the ratio of the output signal level of the
respective gate circuits when the gates are open or in the on-state
with respect to that when they are closed or in the off-state, i.e.
on-off ratio. Thus, it is necessary for the respective circuits to
have large on-off ratios. Further, it is preferable that musical
sounds fade out naturally with the appropriate reverberation. For
achieving this effect, the output of a gate circuit should not
diminish immediately but decrease exponentially at a constant rate
when a corresponding key switch is turned off. However, the on-off
ratios of the conventional gate circuits are not much larger than
50 db and their damping characteristics after turning off the key
switches take deformed exponential shapes so that the output sound
diminishes unnaturally. Yet further, for forming a musical sound,
the appropriate amount of higher harmonics should be mixed with the
fundamental tone. Since a gate circuit is provided for each signal
frequency and a time difference may occur in the gating action of
the respective gate circuits, sometimes the desired electric signal
waveform corresponding to the desired musical sound is not
produced. Further, an output sound may be deformed since similar
damping characteristics are hard to be obtained in the respective
gate circuit.
An object of the invention is to provide a gate circuit having a
large on-off ratio.
Another object of the invention is to provide a gate circuit having
a sustaining effect in which the output of a gate decreases
exponentially upon turning off a corresponding key switch and the
length of time required for the output to decrease to a desired
level can be arbitrarily and easily changed.
A further object of the invention is to provide a gate circuit
which can simultaneously gate a plurality of input signals by one
key switch and which can give a common damping characteristic to a
plurality of output signals corresponding to said plurality of
input signals.
Yet a further object of the invention is to provide a sustaining
gate circuit operated by a small electric current and capable of
damping the output exponentially without any distortion.
Another object of the invention is to provide a gate circuit for
use in electronic musical instruments which is especially effective
when applied to an integrated circuit.
To achieve the above objects, a differential amplifier can be used.
In this case, a differential amplifier is formed by connecting the
emitter electrodes of a pair of transistors in common and further
connecting another transistor working as a constant current source
to said common emitter electrode to vary the mutual conductance or
the transmission conductance of the differential amplifier stage by
the current flowing through said constant current transistor
thereby to perform a gating action. Namely, when a control signal
is cut off by opening the key switch connected to the constant
current transistor, the current flowing through the constant
current transistor decreases exponentially by the effect of a time
delay circuit having a sustaining function and connected to the
input electrode of the constant current transistor and accordingly
the mutual conductance of the differential amplifier stage
decreases exponentially. Thereby, a desired output characteristic
is obtained at an output terminal of the differential amplifier
stage.
According to an embodiment of this invention, the time constant of
the time delay circuit used as an envelope forming circuit can be
arbitrarily altered by adjusting the duty cycle of the control
pulse signal to be applied to the switching element.
This invention will be described hereinafter with reference to the
accompanying drawings in which:
FIG. 1 is a circuit diagram of an embodiment of a gate circuit for
electronic instruments according to the invention;
FIG. 2 is a circuit diagram of another embodiment of a gate circuit
for electronic instruments according to the invention; and
FIGS. 3a to 3c show signal waveforms detected at various points in
the circuit shown in FIG. 1.
FIG. 1 shows a circuit which gates or selects with respect to time
an electrical signal from a plurality of electrical signals in the
frequency range of 40 to 4000 Hz by a gate signal supplied through
one key switch. The circuit comprises active elements Q.sub.1A,
Q.sub.2A and Q.sub.3A having, respectively, input, output and
common electrodes, each active element being a bipolar transistor
having a base, a collector and an emitter electrode. A differential
amplifier is formed by the transistors Q.sub.1A and Q.sub.2A with
the base electrode of one transistor Q.sub.1A connected to an input
terminal 1, the collector electrode of the other transistor
Q.sub.2A connected to an output terminal 2 and the emitters of both
transistors Q.sub.1A and Q.sub.2A connected in common. To this
common connection point, the collector of another transistor
Q.sub.3A is connected. The collector electrode of the transistor
Q.sub.1A is connected to a first voltage supply terminal 3 applied
with voltage V.sub.CC and the collector electrode of the transistor
Q.sub.2A is also connected to the first terminal 3 through a
resistance R.sub.3A. The base electrodes of the transistors
Q.sub.1A and Q.sub.2A are connected to a second voltage supply
terminal 4 applied with voltage V.sub.BB through resistances
R.sub.1A and R.sub.2A, respectively, so as to apply a certain
biasing voltage. The emitter of the transistor Q.sub.3A is
connected to a reference voltage terminal 6 through an emitter
resistance R.sub.4A. The base electrode of the transistor Q.sub.3A
is on one hand connected through a resistance R.sub.5 to a key
switch S which is interlocked with one of the keys of the
instrument and connected to the second terminal 4 via terminal 8
through a forwardly biased diode D.sub.1, and on the other hand
connected to an envelope forming circuit comprising a capacitance
C.sub.2, a diode D.sub.2, resistances R.sub.6 and R.sub.7 and a
transistor Q.sub.4 and working as a time delay circuit. The diode
D.sub.2 is inserted between the base of the transistor Q.sub.3A and
the reference voltage terminal 6 through the resistance R.sub.6 and
the switching transistor Q.sub.4 in a direction so as to be biased
in the same direction as that of the base-emitter junction of the
transistor Q.sub.3A. The base electrode of the switching transistor
Q.sub.4 is connected through a resistance R.sub.7 to a terminal 5
for introducing control pulse input. The capacitor C.sub.2 is
connected between the reference voltage terminal 6, thereby also to
the emitter electrode of the transistor Q.sub.4, and the base of
the transistor Q.sub.3A. An input signal is introduced from an
input terminal 1A to the input electrode 1 through a capacitor
C.sub.1A and the output signal is derived from the output electrode
2 to an output terminal 2A through a capacitor C.sub.3A. The diode
D.sub.1 is inserted as shown in the figure so as to decrease the
emitter voltage of the transistors Q.sub.1A and Q.sub.2A, which is
equal to the collector voltage of the transistor Q.sub.3A, to a
value not more than the base voltage of the transistor Q.sub.3A.
Without this diode D.sub.2, the base voltage of the transistor
Q.sub.3A is maintained higher than the collector voltage of the
transistor Q.sub.3A. Therefore, when the key switch S is opened or
turned off, a saturation current flows through the transistor
Q.sub.3A until the base voltage becomes lower than the collector
voltage. The use of the diode D.sub.1 prevents this phenomenon and
is effective to decrease the output current smoothly when the key
switch S is opened. The diode D.sub.2 prevents such a phenomenon
that when the key switch S is opened and the base voltage of the
transistor Q.sub.3A decreases exponentially, the base voltage of
the transistor Q.sub.3A rapidly becomes smaller than the threshold
voltage V.sub.th of the transistor Q.sub.3A due to the fact that
the transistor Q.sub.4 is in the on-state. Without this diode
D.sub.2, though the output decreases exponentially until the base
voltage of the transistor Q.sub.3A reaches the threshold voltage
V.sub.th, since the base voltage decreases further on, the output
is rapidly damped and the sound disappears unnaturally. By the
insertion of diode D.sub.2 having a threshold voltage substantially
equal to that of the transistor Q.sub.3A, the base voltage of the
transistor Q.sub.3A is held substantially at the threshold voltage,
therefore a damping characteristic with a close approximation to
the exponential function is obtained. The resistance R.sub.5 is
connected in series to the key switch S to prevent the transistor
Q.sub.3 from an input signal being applied suddenly when the key
switch S is turned on and to generate a sound smoothly becoming
louder with a certain rising time length.
Description will now be made on how the circuit of FIG. 1 operates
with reference to FIGS. 3a to 3c which show the waveforms of the
input signal voltage V.sub.in, the base voltage V.sub.B3 of the
transistor Q.sub.3A and the output signal voltage V.sub.out,
respectively, with respect to time. Letter T indicates the
sustaining length of time. In FIG. 1, the supply voltages V.sub.CC
and V.sub.BB are applied to the first and second terminal 3 and 4
respectively and an input signal is introduced to the input
electrode 1 from the input terminal 1.sub.A through the capacitor
C.sub.1A. Supposing that the key switch S is turned on at the time
t = t.sub.0, the base voltage of the transistor Q.sub.3A reaches
the biasing voltage V.sub.B after a period of the rising time shown
as a period between t.sub.0 and t.sub.1 in FIGS. 3a to 3c and then
the collector Q.sub.3A works as a constant current source allowing
the collector current I.sub.C3 to flow which is the sum of the
emitter currents I.sub.e1 and I.sub.e2 flowing through the
transistors Q.sub.1A and Q.sub.2A. If the current I.sub.e1
increases, the other current I.sub.e2 decreases since the sum is
maintained constant. The differential amplifier stage has its
operational voltage point determined by the second source voltage
V.sub.BB transmits the input signal to the output terminal 2, the
signal being amplifier according to the mutual conductance g.sub.m
determined by the collector current I.sub.C3. The output signal
voltage appearing at the output electrode 2 is applied to the
output terminal 2A through the capacitor C.sub.3A. When the key
switch S is turned off at the time t = t.sub.2, the base voltage
V.sub.B3 of the transistor Q.sub.3A decreases according an
exponential curve featured with the time constant of the time delay
circuit connected to the base electrode of the transistor Q.sub.3A
as is shown in FIG. 3b and thus the collector current of the
transistor Q.sub.3A also decreases exponentially. Thereby, the
output signal voltage decreases exponentially. When the base
voltage V.sub.B3 of the transistor Q.sub.3A becomes lower than the
threshold voltage V.sub.th of the transistor Q.sub.3A, the
transistor Q.sub.3A is turned off thereby to cut off the collector
current and then the differential amplifier stage. The output
signal voltage therefore disappears from the output terminal.
Namely, in the gate circuit according to the invention, the
differential amplifier stage performs a switching action by
controlling the total emitter current of the stage by changing the
base voltage level of the transistor Q.sub.3A. In this embodiment,
an on-off ratio above 100 db was obtained.
Further, the switching element Q.sub.4 which is a switching
transistor in this embodiment is used to adjust the sustaining time
length T arbitrarily. When the key switch S is turned off, the base
voltage of the transistor Q.sub.3A decreases according to the
discharge characteristic of the capacitor storing a charge therein
featured by the time constant of the circuit including the
capacitor C.sub.2. The capacitor C.sub.2 can be sufficiently
discharged even by a small current. Further, the effective time
constant .tau. can be arbitrarily varied by arbitrarily selecting
the duty cycle of the control pulse signal, d (expressed by pulse
width (sec.)/period (sec.) for a square pulse). That is, the
effective time constant .tau. is determined as the product of the
capacitance C.sub.2 and the resistance R.sub.6 of the envelope
forming circuit, and the duty cycle d, that is, .tau.=
C.sub.2.sup.. R.sub.6.sup.. d. Therefore, a desired time constant
and a desired sustaining time length T can be obtained by
appropriately varying the duty cycle d. For example, a square wave
pulse train having a duty cycle of 1 to 50 percent, a frequency of
40 KHz and a peak voltage of 10V is applied to the terminal 5 in
this embodiment.
FIG. 2 shows another embodiment of the invention in which
transistors Q.sub.1B, Q.sub.2B and Q.sub.3B forming a similar
circuitry as that of the transistors Q.sub.1A, Q.sub.2A and
Q.sub.3A of the former embodiment are added to the circuit. These
two circuits are connected in parallel to the voltage source
V.sub.CC. An envelope forming circuit comprising a capacitance
C.sub.2, a diode D.sub.2, resistances R.sub.6 and R.sub.7, and a
transistor Q.sub.4 is connected to the base electrodes of the
transistors Q.sub.3A and Q.sub.3B in common. A series connection of
a key switch S, a diode D.sub.1 and a resistance R.sub.5 is also
connected to the base electrodes of the transistors Q.sub.3A and
Q.sub.3B. In this arrangement, two kinds of electrical signal are
subjected to gating operation by one key switch S. The operation of
the circuit of FIG. 2 will be apparent since the structure is
almost the same as that of FIG. 1. Although FIG. 2 shows a gating
circuit for two input signals to be applied to the terminals 1A and
1B respectively, the number of the input signals can be arbitrarily
increased, according to necessity, by connecting the desired number
of circuits constituted by the transistors Q.sub.1A, Q.sub.2A and
Q.sub.3A shown in FIG. 1 in parallel similarly as is shown in FIG.
2. Further, the gate circuit of the invention is especially
effective when applied in an integrated circuit. In such a case,
transistors to be used for a differential amplifier stage are
formed in a unitary semiconductor body to be mutually adjacent
thereto so that various characteristics of the transistors, such as
output characteristic or current amplification coefficient can be
easily made uniform. Since, the gate circuit of this invention does
not need a large resistance, the integration thereof is easy in
this respect, too. The diodes D.sub.1 and D.sub.2 preferably have
characteristics which are compatible with those of the base-emitter
junction of the transistors Q.sub.1A and Q.sub.3A, respectively,
from the standpoint of their function. In this respect also, the
transistors and the diodes are preferably formed simultaneously in
a unitary semiconductor body. In integrated circuits, those
portions as enclosed by the dotted line in FIGS. 1 and 2 may be
formed in a single semiconductor.
Since this invention employs a differential amplifier stage, no
direct coupling exists between the input and output side so that
the leak signal between the input and output side is extremely
small and that a large on-off ratio can be obtained. Further, since
the base voltage of the transistor Q.sub.3A is subjected to a
controlling operation, charge and discharge current flowing into
and from the capacitor C.sub.2 can be small. This is important for
integrating the circuit. Yet further, the addition of the diode
D.sub.1 and D.sub.2 makes the shape of the damping characteristics
of the output to resemble closely an ideal exponential curve. Thus,
the sustaining gate circuit of the invention is very effective for
use in electronic musical instruments.
* * * * *