U.S. patent number 3,639,910 [Application Number 05/009,699] was granted by the patent office on 1972-02-01 for multi-image and signal storage on a storage tube target.
This patent grant is currently assigned to Princeton Electronic Products, Inc.. Invention is credited to Steven R. Hofstein.
United States Patent |
3,639,910 |
Hofstein |
February 1, 1972 |
MULTI-IMAGE AND SIGNAL STORAGE ON A STORAGE TUBE TARGET
Abstract
Method and apparatus for enabling simultaneous storage of
multiple images and/or digital data on a storage tube target, and
for selectively retrieving such information.
Inventors: |
Hofstein; Steven R. (Princeton,
NJ) |
Assignee: |
Princeton Electronic Products,
Inc. (Princeton, NJ)
|
Family
ID: |
21739197 |
Appl.
No.: |
05/009,699 |
Filed: |
February 9, 1970 |
Current U.S.
Class: |
341/155 |
Current CPC
Class: |
G11C
11/23 (20130101); G06F 3/153 (20130101); G09G
1/26 (20130101); H03M 1/361 (20130101) |
Current International
Class: |
G06F
3/153 (20060101); G09G 1/26 (20060101); H03M
1/00 (20060101); G11C 11/21 (20060101); G11C
11/23 (20060101); G06f 003/14 () |
Field of
Search: |
;340/172.5,347,173
;315/8.5,12 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Zache; Raulfe B.
Claims
The embodiments of the invention in which an exclusive property or
privilege is claimed are defined as follows:
1. A method for storing in coincidence a plurality of two-level
images on a storage tube target and reading out and resolving said
images, comprising:
writing a first of said images onto said target at a charge level
v, a second of said images coincident with said first image at a
charge level 2v, up to an n.sup.th image written on said target at
a charge level 2.sup.n v;
reading out the total signal level stored from point to point on
said target as an analog value at each point;
converting said analog values to n parallel binary digit outputs;
and
utilizing the presence or absence of a signal at each of said
parallel binary outputs to indicate the presence or absence of a
corresponding image at the point from which said analog signal is
derived.
2. A method in accordance with claim 1 further including selecting
one of said parallel outputs and applying said output to a display
device to visualize the resolved image thereby represented.
3. Apparatus for storing in coincidence a plurality of two-level
images on a storage tube target and reading out and resolving said
images, comprising:
a storage tube including a storage target therein;
means for writing a first of said images onto said target at a
charge level v, a second of said images coincident with said first
image at a charge level 2v, up to an n.sup. th image at a charge
level 2.sup.n v;
means for reading out the total signal level stored from point to
point on said target as an analog value at each point;
analog-to-digital conversion means for accepting said analog
readout signal and converting said signal to n parallel binary
digit outputs, whereby each of said outputs provides a signal
indicative of the presence or absence of a corresponding image at
the point from which said analog signal is derived.
4. Apparatus in accordance with claim 3 further including means for
utilizing selected of said parallel outputs to visualize said image
signal associated therewith.
5. An information storage and display system, comprising:
a plurality of sources of two-level images;
a storage tube including write circuitry therefore;
means for sequentially applying the outputs from said image sources
to said write circuitry and for setting the writing level of said
write circuitry, so that the image from said first source is
written onto the target of said storage tube at a charge level v,
the image from the second of said sources at a level 2v, up to the
image from the n.sup. th of said sources at a level 2.sup.n v;
means for reading out the total signal stored from point to point
on said target as an analog value at each point;
analog-to-digital conversion means for accepting said analog
readout signal and converting said signal to n parallel binary
digit outputs, whereby each of said outputs provides a signal
indicative of the presence or absence of a corresponding image at
the point from which said analog signal is derived;
utilization means for said parallel outputs; and
means for selecting among said parallel outputs and transferring
said selected output to said utilization means.
6. Apparatus in accordance with claim 5 wherein said utilization
means comprises display means for visualizing the image
corresponding to said output.
7. Apparatus in accordance with claim 5 wherein said utilization
means comprises storage means for storing the image corresponding
to said output.
8. A system according to claim 5 wherein said sources of two-level
images are two in number, and said analog-to-digital conversion
means comprises first, second, and third threshold gates set
respectively to respond to levels v, 2v and 3v, a NAND gate, an OR
gate, and first and second output terminals for receiving outputs
corresponding to the first and second of said images; said first
and second threshold gates being connected in parallel to the
inputs of said NAND gate, the output of said second gate being
further connected directly to said second output terminal, the
output of said NAND gate being connected in parallel with the
output from said third gate to said OR gate, the output from said
OR gate being connected to said first output terminal.
Description
This invention relates generally to information storage and display
systems, and more specifically relates to systems of this type
utilizing a storage tube target as a temporary depository for data
to be displayed or transferred to more permanent storage.
In numerous information storage and display systems, electronic
storage tubes are used as intermediate elements in facilitating the
composition of data for display or storage thereof. In a typical
environment, for example, a charge pattern in the configuration of
selected alphanumeric characters is written onto the target of a
storage tube via information supplied by a character generator or
the like, such pattern constituting, perhaps, a message intended
for display on a CRT device. A readout signal derived from the
scanning of the target by the electron beam of the storage tube is
then used to modulate the CRT device to yield the desired visual
display corresponding to the charge pattern. In applications of
this type, the charge pattern is normally written upon the storage
tube target as a purely two-level signal, since character displays
or the like are basically black and white presentations and require
no intermediate gray levels. Similarly, where the information
written onto the storage tube target is not a configurated pattern
corresponding to characters, but is in the form of digitally
encoded information, representative, for example, of a digitally
encoded number, the written information is placed on the target by
a two-level signal, indicative respectively of a "zero" or "one"
condition.
In my patent application, Ser. No. 9,752, entitled "Data Storage
and Display System," filed of even date herewith, and assigned to
the assignee of the instant application, there is disclosed a
system utilizing a storage tube target having separate storage
areas thereon for writing character sequences in character
configurated form and in digitally encoded form, respectively. Such
a system, in part, addresses itself to the solution of a problem
which is actually more general in nature-- that of storing several
different types of information on a single storage tube target. Not
only is it desirable to achieve such a result in an environment
such as that just mentioned, but in numerous other instances it
would be valuable to store more than one class of data on a given
target. In this connection, it will be observed that the described
system achieves its objectives by placing the different classes of
information on completely different portions of the target. This
aspect of the system is consistent with prior held approaches of
storage tube technology, according to which the charge pattern on
the tube target represents, at a time, but a single overall image.
That is to say, that the charge present upon the target at a given
point is indicative of but a single bit of information stored
thereat.
In accordance with the foregoing, it may be regarded as an object
of the present invention, to provide method and apparatus enabling
simultaneous and coincident storage of multiple two-level images
and/or digital data on a storage tube target, whereby a vast
increase is enabled in the amount of information storable at a
given time on said target.
It is a further object of the invention to provide method and
apparatus for writing, storing in coincidence, and independently
reading out multiple classes of information utilizing but a single
storage tube target for said functions.
It is another object of the invention to provide an information
storage and display system adapted to store multiple images and/or
digital data in coincidence on a storage tube target incorporated
into the system, whereby multiple classes and large quantities of
information at a time may be efficiently stored for display or
readout into a buffer element of the system.
Now in accordance with the present invention, the foregoing
objects, and others as will become apparent in the course of the
ensuing specification, are achieved by writing onto a storage tube
target a first two-level image or digital pattern in a pattern of
charge having a density v, a second two-level image or pattern at a
density level 2v, and as desired, a third two-level image at level
4v, etc., up to a final image or pattern at level 2.sup.n v, where
n is the total number of coincident images or patterns. As a
consequence of this process, charge levels are present from point
to point on said target, the values of which are a unique function
of the coincident components thereof. In order, then, to recover
from the composite charge pattern the total individual image
components, the analog level of the pattern of charge on the target
is converted at points thereof to a parallel binary output, the
presence or absence of a binary digit in the output from a given
target point being indicative of the presence or absence of the
corresponding component image at such point.
The invention is diagrammatically illustrated, by way of example,
in the accompanying drawings, in which:
FIG. 1 is a chart depicting how the method of the invention permits
simultaneous and coincident storage of multiple images on a
single-storage tube target;
FIG. 2 is a schematic flow diagram of a storage and display system
utilizing multiple coincidental storage of images in accordance
with the invention;
FIG. 3 is a logic diagram depicting a simple logic circuit which
may be utilized as an analog to digital converter to separate the
coincidentally stored images of the invention in a system such as
that illustrated in FIG. 2; and
FIG. 4 is a chart setting forth the manner in which varying analog
charge levels furnished to the FIG. 3 circuit results in resolution
of the component images.
The present invention may be utilized with many of numerous types
of storage tubes known in the art. One such suitable tube, is, for
example, shown in my copending patent application Ser. No. 840,698,
filed July 10, 1969 entitled "Electronic Storage Tube," and
assigned to the assignee of the instant application. Such a
disclosed tube includes a target comprising a conductive silicon
substrate, and an overlying insulating mosaic layer of silicon
dioxide. A charge image or pattern deposited on the mosaic layer by
the electron gun in the tube envelope is used to modulate readout
current from the tube target. The structure and composition of the
mosaic and substrate is such that sustained storage and repeated
nondestructive readout of the target is possible, features which
are helpful for the present invention. In general, however, any
conventional tube may be utilized provided (as is the case for the
tube of my cited disclosure) such tube is capable of storing on the
target thereof a sufficient number of delineable charge levels to
yield, upon analog-to-digital conversion, outputs enabling
separation of the component images thereby represented.
The principle pursuant to which the present invention operates is
as follows: Initially a two-level image such as a line drawing or a
"black and white" image such as a composed alphanumeric message or
the like, or two-level digital data, is written onto the storage
tube target at a charge density level of v, i.e., v corresponding
to say "white" and zero to "black." Thereafter, by rescanning
precisely the same portion of the target, a second distinct image
(or other two-level information) is written in coincidence atop the
first image, by writing the second image at a level 2v. If desired,
a third distinct image is then written in precisely the same area
by writing said third image at a level 4v, a fourth image at level
8v, etc., up to an n.sup. th image at level 2.sup.n v. As a result
of such operations, it is then found that an analog signal is
present from point to point on the tube target which is convertible
by analog-to-digital conversion means to parallel binary outputs
indicative of the separate image components.
The basic method of the invention may be better understood by
referring to the chart of FIG. 1, wherein is depicted how, by the
technique specified above, several distinct images may be stored.
While the principle is applicable, as has been indicated, to the
storage of a plurality of images, for illustration it is assumed
that only three such images are involved. Assuming that such images
(identified as 1, 2, and 3) are written at levels v, 2v, and 4v, it
is seen that each of the total analog levels (from 0 to 7v)
uniquely defines the presence or absence of a "white" signal
corresponding to each of the images, identified as 1, 2, and 3 in
column 12 of the FIGURE. The column 11 in the chart is seen to
represent the conversion to binary output of the analog values of
column 10. Thus, for example, the analog value 5v is converted to
the binary output 101. If this binary output is arrayed against the
column headings A, B, and C, it is clear that column A is
assignable to image 1, column B to image 2, and column C to image
3. Thus, it is seen that the binary sequence 101 corresponds to the
presence of a signal from images 1 and 3 at the point sampled and
the absence of a signal from image 2. The other analog values are
similarly analyzed in the chart to show how the analog value may be
taken as a measure of the presence or absence of component images.
While the phrase "image" is used repeatedly throughout this
explanation, it is of course clear that the principle is applicable
to coincidental storage of any two-level pattern.
In FIG. 2, a schematic flow diagram is depicted for a storage and
display system 20 utilizing multiple coincidental storage of images
(or other two-level patterns) in accordance with the invention. A
storage tube 21 therein, of the type previously set forth, has
associated therewith conventional write circuitry 22. Tube 21 will
typically be operated in a secondary emission mode, with the target
potential being maintained above the first crossover point. Write
circuitry 22 is fed from the image sources, 23, 24, and 25, where
additional sources of images may be used as desired. The image
sources actually feed to level setter 26, which, in accordance with
the principles set forth above, supplies signals enabling write
circuitry 22 to write on the tube target at levels v, 2v, 4v etc.,
depending upon which of the image sources is involved.
The coincidentally stored images are read out from storage tube 21
and fed to A/D converter 27 which yields parallel binary outputs to
image selector 28. Display control 29 which controls readout from
storage tube 21 simultaneously activates display 30, which may
conveniently be a CRT device, so that the binary output selected
can be fed to the display 30 at a rate synchronized with a raster
scan at the CRT present thereat to yield a visual display of the
selected image. Alternatively, the selected image may, instead of
being displayed, be transferred to tape storage 31 for more or less
permanent retention.
In FIG. 3, a simple logic circuit, consisting of threshold, NAND,
and OR gates is shown which specifically illustrates how the
present invention may be utilized to separate two coincidentally
stored images. Such "images" may, for example, comprise
configurated alphanumeric characters and digitally encoded data
therefor, such as is discussed in my previously cited patent
application, Ser. No. 9,752, filed of even date herewith. This
FIGURE should be considered simultaneously with the chart of FIG.
4, which sets forth the manner in which varying analog levels
furnished to the FIG. 3 circuit results in resolution of the
component images.
In particular, the input at terminal 32-- i.e., the output from
reading of the stored charge pattern on the tube target-- is
applied to threshold gates 33, 34 and 35, set respectively to
respond at levels v, 2v, and 3v. It is seen that if the analog
level v.sub. 1 is less that v, no signal passes from any of the
threshold gates and a zero output is provided at both terminals 36
and 37, the output terminals respectively for image 1, and image 2.
If the analog level v.sub. 1 is between v and 2v, a signal is
present through gate 33, but not through gates 34 and 35. Under
such conditions a signal is provided at the output of NAND-gate 39
and thence through OR-gate 40 and to terminal 36.
If the analog level is such that 2v< v.sub. 1 <3v, gates 33
and 34 are activated, but not gate 35. A signal is thus present for
image 2 at terminal 37, but NAND-gate 39 blocks any indication for
terminal 36. Finally, if the analog level is such that v.sub. 1
>3v, then signals are clearly present at both terminals 36 and
37, indicating presence of both image 1 and image 2 at the analyzed
point.
While the present invention has been particularly described in
terms of specific embodiments thereof, it is apparent to those
skilled in the art that numerous modifications are possible without
departing from the spirit of the invention and the scope of the
subjoined claims.
* * * * *