Time Delay Antidisturbance Faze

Abstract

A fuze having an electronic arming delay timer, an antidisturbance firing mechanism, and a mechanical clock timer to detonate the fuze after a prescribed period of time if the antidisturbance firing mechanism is not actuated.

Description

BACKGROUND OF THE INVENTION

It is desirable to have a fuze that can not detonate during handling, and once armed, is not capable of being disarmed.

Such a fuze should additionally provide a safety feature which would delay arming for a preselected period of time after the means for arming are initiated. After arming is achieved, the fuse should detonate if an attempt to move it is made prior to the prescribed detonation time.

SUMMARY OF THE INVENTION

In accordance with the present invention, an electronic timer in the form of a dual unijunction relaxation oscillator is initiated. At the conclusion of the timing cycle, the dual unijunction timer triggers a silicon-controlled switch which removes a shunt placed across a firing capacitor and simultaneously turns off a transistor switch. The transistor switch prevents further current drain by the arming timer.

The firing capacitor is now permitted to charge, and when it becomes sufficiently charged, the fuze is armed and ready for detonation.

Detonation will occur in response to the movement of the trembler switch.

A mechanical clock having a time constant considerably longer than the time constant of the dual unijunction relaxation oscillator is started simultaneously with the unijunction oscillator. The clock has contacts which close upon completion of its cycle. These contacts are placed in parallel with the trembler switch so that the clock will cause detonation at the end of its cycle.

In response to the trembler switch or the clock, the firing capacitor triggers a silicon-controlled rectifier which applies the charge on the firing capacitor to a squib to cause detonation.

BRIEF DESCRIPTION OF THE DRAWING

FIG. 1 is a block diagram of the system;

FIG. 2 is a "time-line" of the operation of the system shown in FIG. 1; and

FIG. 3 is a schematic diagram of the electronic circuitry of the system of FIG. 1.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIG. 1, upon closing of switch S.sub.1 an electronic arming timer 11 and timer 23, which may be a mechanical clock, being their timing cycles at time t.sub.0 as shown in FIG. 2.

During the time interval from t.sub.0 until t.sub.1 power cutoff 10 supplies power to timer 11, and power clamp 12 prevents accidental detonation by circuit 13.

At time t.sub.1 timer 11 triggers power clamp 12, which in turn causes power cutoff 10 to prevent further current from voltage source V.sub.1 to flow to timer 11 and arms circuit 13 to permit detonation.

Timer actuation 23, which may be a mechanical clock, is set to cause detonation via firing circuit 27 at a prescribed time, t.sub.3, occurring after time t.sub.0. If the fuze is distributed during the time interval from t.sub.1 until t.sub.3 an antidisturbance actuation means, which may be a trembler switch, will cause detonation via firing circuit 27 at time t.sub.2.

FIG. 3 is a schematic diagram of the system just prior to time t.sub.0. For the sake of safety, switch S.sub.2 remains closed until just prior to time t.sub.0.

To initiate the arming cycle, switch S.sub.1 is closed at time t.sub.0. Silicon-controlled switch 17 is turned on bringing point 18 to ground. Thus, during the arming cycle point 20 is held at ground potential to prevent charging of firing capacitor 21 and accidental detonation. As point 18 is brought to ground, transistor switch 14 is turned on.

When switch S.sub.1 is closed, therefore, current flows from voltage source V.sub.1 through transistor switch 14 to dual unijunction transistor timer 11. Timer 11 comprises a first unijunction transister relaxation oscillator consisting of unijunction transistor 16, resistor 31 and capacitor 29; and a second unijunction transistor relaxation oscillator consisting of unijunction transistor 15, resistor 30 and capacitor 28. Unijunction transistor 16 is necessary to achieve a predetermined, long time delay in the second unijunction transistor relaxation oscillator.

Upon closing of transistor switch 14, capacitors 28 and 29 begin to charge through resistors 30 and 31 respectively. The combination of resistor 30 and capacitor 28 produces a long time constant for the second relaxation oscillator in comparison to the time constant resulting from the combination of resistor 31 and capacitor 29.

The potential at the emitter of unijunction transistor 16 will rise exponentially, in response to the time constant produced by resistor 31 and capacitor 29, until the breakdown voltage of unijunction transistor 16 is reached. At breakdown, the emitter potential drops to zero.

Simultaneously, the emitter potential of unijunction transistor 15 is rising exponentially at a much slower rate in response to the time constant produced by register 30 and capacitor 28. Resistor 30 is large for the purposes of a high time constant, therefore unijunction transistor 15 cannot fire because it cannot draw enough current through resistor 30.

To permit unijunction transistor 15 to fire, the emitter of unijunction transistor 16 is coupled to the nongrounded base of unijunction transistor 15. When the potential at the emitter of unijunction transistor 16 drops to zero, the breakdown voltage of unijunction transistor 15 is caused to be lowered. Current may now be drawn from capacitor 28 to fire unijunction transistor 15 at time t.sub.1.

The firing of unijunction transistor 15 sends an arming pulse into diode 32 which turns silicon-controlled switch 17 off. Point 18 is now permitted to charge up to potential V.sub.1. The potential rise of point 18 places a potential at the base of transistor switch 14 to open the emitter-collector circuit and cut off further current to electronic arming timer 11.

Zener diode 19 prevents a false trigger pulse resulting from feedback from the internal impedance of source V.sub.1 from turning silicon-controlled switch 17 back on. Firing capacitor 21 is thus permitted to charge to potential V.sub.1. The fuze is now fully armed and ready for detonation.

Detonation will occur when the potential across firing capacitor 21 is applied, by either trembler switch 22 or clock 23, via Shockly diode 24 to silicon-controlled rectifier 25. The silicon-controlled rectifier applies the potential across firing capacitor 21 to a squib 26 for detonation.

Clock 23 may be a simple mechanical clock having contacts which close after a predetermined interval, at time t.sub.3.

Shockly diode 24 acts as a level detector to prevent firing of silicon-controlled rectifier 25 when there is inadequate voltage to fire squib 26. The breakdown voltage of the Shockly diode is greater than the minimum voltage necessary to fire the squib 26. Therefore, if the potential across firing capacitor 21 has not reached firing potential, a premature disturbance will not cause insufficient detonation.

The invention described herein may be manufactured and used by or for the Government of the United States of America for governmental purposes without the payment of any royalties thereon or therefor.

Claims

We claim:

1. A fuze comprising:

means to initiate electrical timing means;

electrical timing means to delay arming of the fuze for a first interval of time, during which time said arming is prevented;

means to prevent firing of the fuze prior to the end of said first interval of time;

means for simultaneously arming the fuze at the end of said first period of time and preventing further current drain to the electrical timing means;

antidisturbance means for detonating the fuze at any time after the first interval of time; and

mechanical timing means to detonate the fuze after a second interval of time which interval is longer than said first interval of time.

2. The system of claim 1 wherein said electrical timing means to delay arming comprises:

a first unijunction transistor relaxation oscillator having a short time constant;

a second unijunction transistor relaxation oscillator having a time constant approximately equal to the arming delay time;

means for coupling the first and second oscillator so that the output of the first oscillator lowers the breakdown voltage of the unijunction transistor of the second oscillator to ensure breakdown of said transistor at the end of a period equal to one time constant.

3. The system of claim 2 wherein said means to prevent firing of the fuze prior to the end of said first interval of time comprises:

a silicon-controlled switch which grounds the firing circuit upon initiation of said electrical timing means; and

removes said ground upon receiving an output pulse from the electrical timing means.

4. The system of claim 3 wherein said silicon-controlled switch operates a transistor switch which cuts off current to the electrical timing means in response to an output pulse from the electrical timing means.

5. The system of claim 4 wherein the antidisturbance means for detonating the fuze comprises:

a switch capable of firing a properly biased silicon-controlled rectifier which will detonate the fuze.

6. The system of claim 5 wherein the antidisturbance switch is a trembler switch.

7. The system of claim 6 wherein the mechanical timing means for detonating the fuze comprises:

a pair of contacts which when closed are capable of firing a properly biased silicon-controlled rectifier which will detonate the fuze; and

the pair of contacts are closed by a clock timer.