Method of uniform current distribution using current modified layer

Abstract

An electric device has a p-n diode, where the p-n diode is covered with a current modified layer (CML). With a resistance distribution of the CML, a current is decreased toward all directions from a point on a bonding pad between the CML and the p-n diode. Hence, a current is uniformly distributed on the CML by fine tuning the resistance distribution. Thus, an effectiveness of the electric device is improved.

Description

FIELD OF THE INVENTION

[0001] The present invention relates to a current distribution; more particularly, relates to obtaining a current modified layer (CML) to uniformly distribute a current and to thus improve an effectiveness of an electric device.

DESCRIPTION OF THE RELATED ART

[0002] For flexible electric devices, a transparent conducting layer has a good conductivity and a 80% transparency to visible light. Therefore, the transparent conducting layer is widely used to fabricate electrodes of electro-optical devices, like solar cell, a flat panel display, an organic light emitting display (OLED), a touch screen, etc. As is well known, chemical composition, structure, crystallization, surface status and mechanics of the electro-optical device has direct impacts on its characteristics and effectiveness. Since semiconductor technologies are improving, the transparent conducting layer is more widely used; and its utilization in a display even becomes a hot research topic in the electro-optical industry.

[0003] Up to now, the transparent conducting layer is mostly used as a conductive electrode; and the transparent conductive electrode is usually used in a p-side up LED to improve a current distribution of an electrode. However, when the transparent conductive electrode is used in a thin GaN structure, the improvement on current distribution is not as good as when used in the p-side up LED. Hence, the prior art does not fulfill all users' requests on actual use.

SUMMARY OF THE INVENTION

[0004] The main purpose of the present invention is to obtain a CML to uniformly distribute a current and to thus improve an effectiveness of an electric device.

[0005] To achieve the above purpose, the present invention is a method of a uniform current distribution using a CML, comprising steps of (a) obtaining a semiconductor with a p-n junction; and (b) deposing a resistance-varied transparent conducting layer as a CML on the semiconductor with the p-n junction, where a metal layer or resistance layer with a non-uniform density can be further deposed on the resistance-varied transparent conducting layer; the resistance-varied transparent conducting layer can be further roughened on surface; the resistance-varied transparent conducting layer is a p-type semiconductor, an n-type semiconductor or a insulator; the metal layer is a p-type semiconductor or an n-type semiconductor; the resistance layer is a p-type semiconductor an n-type semiconductor or a nonconductor; and the resistance-varied transparent conducting layer as a CML spreads current for obtaining a uniformly distributed current and thus for an improved effectiveness. Accordingly, a novel method of a uniform current distribution using a CML is obtained.

BRIEF DESCRIPTIONS OF THE DRAWINGS

[0006] The present invention will be better understood from the following detailed descriptions of the preferred embodiments according to the present invention, taken in con junction with the accompanying drawings, in which FIG. 1 is the flow view showing the first preferred embodiment according to the present invention;

[0007] FIG. 2 is the view showing the n-side up semiconductor of the first preferred embodiment;

[0008] FIG. 3 is the view showing the first preferred embodiment having the n-side up structure;

[0009] FIG. 4 is the view showing the first preferred embodiment having the p-side up structure;

[0010] FIG. 5 is the flow view showing the second preferred embodiment;

[0011] FIG. 6 is the view showing the n-side up semiconductor of the second preferred embodiment;

[0012] FIG. 7 is the view showing the resistance-varied transparent conducting layer adhered on the n-side up semiconductor of the second preferred embodiment;

[0013] FIG. 8 is the view showing the n-side up second preferred embodiment;

[0014] FIG. 9 is the view showing the metal layer adhered on the resistance-varied transparent conducting layer of the second preferred embodiment;

[0015] FIG. 10 is the flow view showing the third preferred embodiment;

[0016] FIG. 11 is the view showing the n-side up semiconductor of the third preferred embodiment;

[0017] FIG. 12 is the view showing the n-side up third preferred embodiment;

[0018] FIG. 13 is the view showing the resistance-varied transparent conducting layer with a uniform overall thickness; a n d

[0019] FIG. 14 is the view showing the resistance-varied transparent conducting layer with a non-uniform overall thickness.

DESCRIPTIONS OF THE PREFERRED EMBODIMENTS

[0020] The following descriptions of the preferred embodiments are provided to understand the features and the structures of the present invention.

[0021] Please refer to FIG. 1 to FIG. 4, which are a flow view of a first preferred embodiment; a view showing an n-side up semiconductor of the first preferred embodiment; and views showing the first preferred embodiment having an n-side up structure or a p-side up structure according to the present invention. As shown in FIG. 1, the present invention is a method of a uniform current distribution using a current modified layer, comprising the following steps:

[0022] (a) Obtaining a semiconductor with a p-n junction 11: As shown in FIG. 2, a p-type semiconductor 21 and an n-type semiconductor 22 are obtained through epitaxy growth and are bonded to obtain a semiconductor with a p-n junction 23, where the semiconductor with the p-n junction 23 has an n-side up structure or a p-side up structure; the semiconductor with the p-n junction 23 has a structure of pairs of multiple-quantum-well (MQW) or a structure of layers of heterostructures and p-type-intrinsic-n-type (p-i-n optical detector structures; and the semiconductor with the p-n junction 23 is made of at least one III-V material, which is GaAs, InP, GaN, AlGaN, AlN, GaInN, AlGaInN, InN, GaInAsN or GaInPN, or is made of a monocrystalline silicon, a multicrystalline silicon or an amorphous silicon.

[0023] (b) Deposing a resistance-varied transparent conducting layer 12: As shown in FIG. 3 and FIG. 4, a resistance-varied transparent conducting layer 24 is then added on the semiconductor with the p-n junction 23 to form a current modified layer (CML), where the resistance-varied transparent conducting layer 24 is flat and is transparent; resistance of the resistance-varied transparent conducting layer 24 is decreased toward all directions from a point on a bonding pad between the resistance-varied transparent conducting layer 24 and the semiconductor with the p-n junction 23 and thus a current is effectively spread toward all directions as well; the resistance-varied transparent conducting layer 24 is made of a metal oxide; the resistance-varied transparent conducting layer 24 is a p-type semiconductor, an n-type semiconductor or an insulator; the resistance-varied transparent conducting layer 24 is transparent to visible light, infrared (IR) and ultraviolet (U V); the resistance-varied transparent conducting layer 24 is adhered to the semiconductor with the p-n junction 23 above a p-type semiconductor 21 of the semiconductor with the p-n junction 23, beneath the p-type semiconductor 21 of the semiconductor with the p-n junction 23, above an n-type semiconductor 22 of the semiconductor with the p-n junction 23, or beneath the n-type semiconductor 22 of the semiconductor with the p-n junction 23; and the resistance-varied transparent conducting layer 24 has a uniform overall thickness or a non-uniform overall thickness.

[0024] With the above steps, the present invention is applied to an electric device, which is a light emitting display (LED), a solar cell, an organic LED (OLED), a liquid crystal display (LCD) or a touch panel. With a coordination of the CML formed by the resistance-varied transparent conducting layer 24, a current in the electric device is uniformly distributed and thus the effectiveness of the electric device is improved.

[0025] Please refer to FIG. 5 to FIG. 9, which are a flow view of a second preferred embodiment; a view showing an. n-side up semiconductor of the second preferred embodiment; a view showing a resistance-varied transparent conducting layer adhered on the n-side up semiconductor of the second preferred embodiment; a view showing an n-side up second preferred embodiment; and a view showing a metal layer adhered on the resistance-varied transparent conducting layer of the second preferred embodiment. As shown in FIG. 5, the present invention is a method of a uniform current distribution using a current modified layer, comprising the following steps:

[0026] (a) Obtaining a semiconductor with a p-n junction 31: As shown in FIG. 6, a p-type semiconductor 41 and an n-type semiconductor 42 are obtained through epitaxy growth and are bonded to obtain a semiconductor with a p-n junction 43, where the semiconductor with the p-n junction 43 has an n-side up structure or a p-side up structure; the semiconductor with the p-n junction 43 has a structure of pairs of MQW or a structure of layers of heterostructures and p-i-n optical detector structures; and the semiconductor with the p-n junction 43 is made of at least one III-V material, which is GaAs, InP, GaN, AlGaN, AlN, GaInN, AlGaInN, InN, GaInAsN or GaInPN, or is made of a monocrystalline silicon, a multicrystalline silicon or an amorphous silicon.

[0027] (b) Deposing a resistance-varied transparent conducting layer 32: As shown in FIG.7, a resistance-varied transparent conducting layer 44 is added on the semiconductor with the p-n junction 43 to form a CML, where the resistance-varied transparent conducting layer 44 is flat and is transparent; resistance of the resistance-varied transparent conducting layer 44 is decreased toward all directions from a point on a bonding pad between the resistance-varied transparent conducting layer 44 and the semiconductor with the p-n junction 43 and thus a current is effectively spread toward all directions as well; the resistance-varied transparent conducting layer 44 is made of a metal oxide; the resistance-varied transparent conducting layer 44 is a p-type semiconductor, an n-type semiconductor or an insulator; the resistance-varied transparent conducting layer 44 is transparent to visible light, IR and UV; the resistance-varied transparent conducting layer 44 is adhered to the semiconductor with the p-n junction 43 above a p-type semiconductor 41 of the semiconductor with the p-n junction 43, beneath the p-type semiconductor 41 of the semiconductor with the p-n junction 43, above an n-type semiconductor 42 of the semiconductor with the p-n junction 43, or beneath the n-type semiconductor 42 of the semiconductor with the p-n junction 43; and the resistance-varied transparent conducting layer 44 has a uniform overall thickness or a non-uniform overall thickness.

[0028] (c) Deposing a metal layer or resistance layer with a non-uniform density 33: As shown in FIG. 8, a metal layer or resistance layer 45 with a non-uniform density is added on the resistance-varied transparent conducting layer 44 to form a CML. With the non-uniform density of the metal layer or resistance layer 45, a current is flowed from a high-density position to a low-density position, where the metal layer is a p-type semiconductor or an n-type semiconductor; and the resistance layer is a p-type semiconductor, an n-type semiconductor or a nonconductor.

[0029] With the above steps, the present invention is applied to an electric device, which is a LED, a solar cell, an OLED, a LCD or a touch panel. With a coordination of the CML formed by the resistance-varied transparent conducting layer 44 and the metal layer or resistance layer 45, a current in the electric device is uniformly distributed and thus the effectiveness of the electric device is improved.

[0030] Please refer to FIG. 10 to FIG. 12, which are a flow view showing the third preferred embodiment; a view showing the n-side up semiconductor of the third preferred embodiment; and a view showing an n-side up third preferred embodiment. As shown in FIG. 10, the present invention is a method of a uniform current distribution using a current modified layer, comprising the following steps:

[0031] (a) Obtaining a semiconductor with a p-n junction 51: As shown in FIG.11, a p-type semiconductor 61 and an n-type semiconductor 62 are obtained through epitaxy growth and are bonded to obtain a semiconductor with a p-n junction 63, where the semiconductor with the p-n junction 63 has an n-side up structure or a p-side up structure; the semiconductor with the p-n junction 63 has a structure of pairs of MQW or a structure of layers of heterostructures and p-i-n optical detector structures; and the semiconductor with the p-n junction 63 is made of at least one III-V material, which is GaAs, InP, GaN, AlGaN, AlN, GaInN, AlGaInN, InN, GaInAsN or GaInPN, or is made of a monocrystalline silicon, a multicrystalline silicon or an amorphous silicon.

[0032] (b) Deposing a resistance-varied transparent conducting layer to be roughened 52: As shown in FIG. 12, a resistance-varied transparent conducting layer 64 is added on the semiconductor with the p-n junction 63 to form a CML; and then the resistance-varied transparent conducting layer 64 is roughened on surface to form a CML, where the resistance-varied transparent conducting layer 64 is flat and is transparent; the resistance-varied transparent conducting layer 64 is made of a metal oxide; the resistance-varied transparent conducting layer 64 is a p-type semiconductor, an n-type semiconductor or an insulator; the resistance-varied transparent conducting layer 64 is transparent to visible light, IR and UV; the resistance-varied transparent conducting layer 64 is adhered to the semiconductor with the p-n junction 63 above a p-type semiconductor 61 of the semiconductor with the p-n junction 63, beneath the p-type semiconductor 61 of the semiconductor with the p-n junction 63, above an n-type semiconductor 62 of the semiconductor with the p-n junction 63, or beneath the n-type semiconductor 62 of the semiconductor with the p-n junction 63; and the resistance-varied transparent conducting layer 64 has a uniform overall thickness or a non-uniform overall thickness.

[0033] With the above steps, the present invention is applied to an electric device, which is a LED, a solar cell, an OLED, a LCD or a touch panel. With a coordination of the CML formed by the resistance-varied transparent conducting layer 64, a current in the electric device is uniformly distributed and thus the effectiveness of the electric device is improved.

[0034] Please refer to FIG. 13 and FIG. 14, which are views showing a resistance-varied transparent conducting layer with a uniform overall thickness and a resistance-varied transparent conducting layer with a non-uniform overall thickness. As shown in the figures, a resistance-varied transparent conducting layer with a uniform overall thickness 71 has a variable resistance in a horizontal direction, where the resistance-varied transparent conducting layer with a uniform overall thickness 71 has a variable resistance coefficient (.rho.(x) having a correlation to a horizontal position (x) on the resistance-varied transparent conducting layer with the uniform overall thickness 71. The resistance-varied transparent conducting layer with a non-uniform overall thickness 72 has a resistance affected by the non-uniform overall thickness, where a thickness at a position on the transparent conducting layer (t(x)) and a variable resistance coefficient (.rho.(x)) have a correlation to a horizontal position (x) on the resistance-varied transparent conducting layer with the non-uniform overall thickness 72; and the position on the transparent conducting layer and the variable resistance coefficient are obtained from a function, which can be a discontinuous function.

[0035] To sum up, the present invention is a method of a uniform current distribution using a current modified layer, where a current is spread horizontally to solve the problem of non-uniformly distributed current in a thin GaN LED.

[0036] The preferred embodiments herein disclosed are not intended to unnecessarily limit the scope of the invention. Therefore, simple modifications or variations belonging to the equivalent of the scope of the claims and the instructions disclosed herein for a patent are all within the scope of the present invention.

Claims

1. A method of a uniform current distribution using a current modified layer, comprising steps of: (a) obtaining a semiconductor with a p-n junction; and (b) deposing a resistance-varied transparent conducting layer on said semiconductor with said p-n junction to spread current.

2. The method according to claim 1, wherein said method is applied to an electric device; and wherein said electric device is selected from a group consisting of a light emitting display (LED), a solar cell, an organic LED (OLED), a liquid crystal display (LCD) and a touch panel.

3. The method according to claim 1, wherein said semiconductor with said p-n junction has a structure selected from a group consisting of an n-side up structure and a p-side up structure.

4. The method according to claim 1, wherein said semiconductor with said p-n junction has a structure selected from a group consisting of a structure of pairs of multiple-quantum-well (MQW) and a structure of layers of heterostructures and p-type-intrinsic-n-type (p-i-n) optical detector structures.

5. The method according to claim 1, wherein said semiconductor with said p-n junction is made of at least one III-V material; and wherein said III-V material is selected from a group consisting of GaAs, In P, GaN, AlGaN, AlN, GaInN, AlGaInN, InN, GaInAsN and GaInPN

6. The method according to claim 1, wherein said semiconductor with said p-n junction is made of a silicon selected from a group consisting of a monocrystalline silicon, a multicrystalline silicon and an amorphous silicon.

7. The method according to claim 1, wherein said resistance-varied transparent conducting layer is flat and is transparent.

8. The method according to claim 1, wherein said resistance-varied transparent conducting layer is selected from a group consisting of a p-type semiconductor, an n-type semiconductor and an insulator.

9. The method according to claim 1, wherein said resistance-varied transparent conducting layer is made of a metal oxide.

10. The method according to claim 1, wherein said resistance-varied transparent conducting layer is transparent to visible light, infrared and ultraviolet.

11. The method according to claim 1, wherein said resistance-varied transparent conducting layer is adhered to said semiconductor with said p-n junction in a way selected from a group consisting of above a p-type semiconductor of said semiconductor with a p-n junction, beneath said p-type semiconductor of said semiconductor with a p-n junction, above an n-type semiconductor of said semiconductor with a p-n junction, and beneath said n-type semiconductor of said semiconductor with a p-n junction,

12. The method a according to claim 1, wherein said resistance-varied transparent conducting layer on said semiconductor with said p-n junction has an overall thickness selected from a group consisting of a uniform overall thickness or a non-uniform overall thickness.

13. The method according to claim 1, wherein said resistance-varied transparent conducting layer with said uniform overall thickness has a resistance being varied in a horizontal direction; and wherein a variable resistance coefficient of said resistance-varied transparent conducting layer has a correlation to a position on said resistance-varied transparent conducting layer related to a point on a bonding pad between said resistance-varied transparent conducting layer and said semiconductor with said p-n junction.

14. The method according to claim 13, wherein said variable resistance coefficient is obtained from a function; and wherein said function includes a discontinuous function.

15. The method according to claim 12, wherein said resistance-varied transparent conducting layer with said non-uniform overall thickness varies resistance in a horizontal direction according to a thickness at a position on said resistance-varied transparent conducting layer; and wherein a variable resistance coefficient and said thickness at said position on said resistance-varied transparent conducting layer have correlations to said position on said resistance-varied transparent conducting layer related to a point on a bonding pad between said resistance-varied transparent conducting layer and said semiconductor with said p-n junction.

16. The method according to claim 15, wherein said thickness at said position on said resistance-varied transparent conducting layer, and said variable resistance coefficient are obtained from functions; and wherein said functions include a discontinuous function.

17. The method according to claim 1, wherein said resistance-varied transparent conducting layer further comprises a layer selected from a group consisting of a metal layer and a resistance layer; and wherein said layer has a non-uniform density.

18. The method according to claim 17, wherein said metal layer is selected from a group consisting of a p-type semiconductor and an n-type semiconductor.

19. The method according to claim 17, wherein said resistance layer is selected from a group consisting of a p-type semiconductor, an n-type semiconductor and a nonconductor.

20. The method according to claim 1, wherein said resistance-varied transparent conducting layer is further roughened on surface.