Zier; Steven J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Zier; Steven J..The latest application filed is for "in-line transistor bandwidth measurement".

Company Profile

0.14.16

Zier; Steven J. - Hopewell Junction NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
In-Line Transistor Bandwidth Measurement App 20140184242 - Hedberg; Erik L. ; et al.	2014-07-03
Design structure for transmitter bandwidth optimization circuit Grant 8,219,041 - Hsu , et al. July 10, 2	2012-07-10
Transmitter bandwidth optimization circuit Grant 8,219,040 - Hsu , et al. July 10, 2	2012-07-10
System and method for latency reduction in speculative decision feedback equalizers Grant 8,126,045 - Bulzacchelli , et al. February 28, 2	2012-02-28
Avoiding device stressing Grant 7,694,243 - Camara , et al. April 6, 2	2010-04-06
System And Method For Latency Reduction In Speculative Decision Feedback Equalizers App 20100054324 - Bulzacchelli; John Francis ; et al.	2010-03-04
High-speed multi-mode receiver Grant 7,660,350 - Hsu , et al. February 9, 2	2010-02-09
Avoiding Device Stressing App 20090172614 - Camara; Hibourahima ; et al.	2009-07-02
Structure for transmitter bandwidth optimization circuit App 20090129485 - Hsu; Louis L. ; et al.	2009-05-21
Design structure for CMOS differential rail-to-rail latch circuits App 20090108885 - Natonio; Joseph ; et al.	2009-04-30
Signal detector with calibration circuit arrangement Grant 7,486,114 - Chen , et al. February 3, 2	2009-02-03
Transmitter Bandwidth Optimization Circuit App 20090004978 - Hsu; Louis L. ; et al.	2009-01-01
High-speed multi-mode receiver App 20080298520 - Hsu; Louis C. ; et al.	2008-12-04
High Speed Multi-Mode Receiver with adaptive receiver equalization and controllable transmitter pre-distortion Grant 7,409,019 - Hsu , et al. August 5, 2	2008-08-05
Cmos Differential Rail-to-rail Latch Circuits App 20080180139 - Natonio; Joseph ; et al.	2008-07-31
CML to CMOS signal converter Grant 7,394,283 - Hsu , et al. July 1, 2	2008-07-01
Cml To Cmos Signal Converter App 20080061825 - Hsu; Louis L. ; et al.	2008-03-13
Method to avoid device stressing Grant 7,332,956 - Camara , et al. February 19, 2	2008-02-19
Signal Detector with Calibration Circuit Arrangement App 20070271054 - Chen; Minhan ; et al.	2007-11-22
Differential amplifier offset voltage minimization independently from common mode voltage adjustment Grant 7,268,624 - Chen , et al. September 11, 2	2007-09-11
Methods and apparatus for testing an integrated circuit Grant 7,265,696 - Hsu , et al. September 4, 2	2007-09-04
Methods and apparatus for testing an integrated circuit App 20070103350 - Hsu; Louis Lu-Chen ; et al.	2007-05-10
Method To Avoid Device Stressing App 20070096797 - Camara; Hibourahima ; et al.	2007-05-03
Analog MOS circuits having reduced voltage stress Grant 7,205,830 - Gangasani , et al. April 17, 2	2007-04-17
Differential amplifier offset voltage minimization independently from common mode voltage adjustment App 20070035342 - Chen; Minhan ; et al.	2007-02-15
Analog Mos Circuits Having Reduced Voltage Stress App 20060145751 - Gangasani; Gautam ; et al.	2006-07-06
High Speed Multi-Mode Receiver App 20060067440 - Hsu; Louis C. ; et al.	2006-03-30
Programmable peaking receiver and method Grant 6,937,054 - Hsu , et al. August 30, 2	2005-08-30
Programmable Peaking Receiver And Method App 20040239369 - Hsu, Louis L. ; et al.	2004-12-02
BIFET logic circuit Grant 4,746,817 - Banker , et al. May 24, 1	1988-05-24

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