| Patent | Date |
|---|
System and method for maintaining local oscillator (LO) phase continuity
Grant 11,264,995 - Chao , et al. March 1, 2 | 2022-03-01 |
Methods and apparatus for a transmit path with frequency hopping phase locked loop
Grant 10,575,279 - Asuri , et al. Feb | 2020-02-25 |
Phase frequency detector linearization using switching supply
Grant 10,534,025 - Zhuang Ja | 2020-01-14 |
Distributed differential interconnect
Grant 10,523,272 - Vallabhaneni , et al. Dec | 2019-12-31 |
Master-slave level shifter array architecture with pre-defined power-up states
Grant 10,256,796 - Hsin , et al. | 2019-04-09 |
Fractional-N phase locked loop delta sigma modulator noise reduction using charge pump interpolation
Grant 10,177,772 - Zhuang , et al. J | 2019-01-08 |
Phase Frequency Detector Linearization Using Switching Supply
App 20180356451 - ZHUANG; Jingcheng | 2018-12-13 |
Distributed Differential Interconnect
App 20180343032 - Vallabhaneni; Madhukar ; et al. | 2018-11-29 |
System-on-a-chip clock phase management using fractional-N PLLs
Grant 10,116,315 - Zhuang , et al. October 30, 2 | 2018-10-30 |
Master-slave Level Shifter Array Architecture With Pre-defined Power-up States
App 20180254772 - Hsin; Shih-Chieh ; et al. | 2018-09-06 |
PLL post divider phase continuity
Grant 9,998,129 - Zhuang , et al. June 12, 2 | 2018-06-12 |
Re-timing based clock generation and residual sideband (RSB) enhancement circuit
Grant 9,973,182 - Paul , et al. May 15, 2 | 2018-05-15 |
Re-timing Based Clock Generation And Residual Sideband (rsb) Enhancement Circuit
App 20180076805 - PAUL; Animesh ; et al. | 2018-03-15 |
Phase continuity technique for frequency synthesis
Grant 9,893,875 - Zanuso , et al. February 13, 2 | 2018-02-13 |
Fractional-n Phase Locked Loop Delta Sigma Modulator Noise Reduction Using Charge Pump Interpolation
App 20180019756 - ZHUANG; Jingcheng ; et al. | 2018-01-18 |
Time-to-digital conversion with latch-based ring
Grant 9,864,341 - Zhuang January 9, 2 | 2018-01-09 |
Phase Continuity Technique For Frequency Synthesis
App 20170338940 - ZANUSO; Marco ; et al. | 2017-11-23 |
Methods And Apparatus For A Transmit Path With Frequency Hopping Phase Locked Loop
App 20170094641 - Asuri; Bhushan Shanti ; et al. | 2017-03-30 |
Unified front-end receiver interface for accommodating incoming signals via AC-coupling or DC-coupling
Grant 9,584,184 - Li , et al. February 28, 2 | 2017-02-28 |
Glitch free bandwidth-switching scheme for an analog phase-locked loop (PLL)
Grant 9,520,887 - Zhuang , et al. December 13, 2 | 2016-12-13 |
Band-gap current repeater
Grant 9,176,511 - Dang , et al. November 3, 2 | 2015-11-03 |
Band-gap Current Repeater
App 20150301539 - Dang; Nam Van ; et al. | 2015-10-22 |
Systems and methods for frequency detection
Grant 8,970,254 - Murphy , et al. March 3, 2 | 2015-03-03 |
Methods and devices for matching transmission line characteristics using stacked metal oxide semiconductor (MOS) transistors
Grant 8,928,365 - Li , et al. January 6, 2 | 2015-01-06 |
Dual mode clock/data recovery circuit
Grant 8,839,020 - Zhuang , et al. September 16, 2 | 2014-09-16 |
Unified Front-end Receiver Interface For Accommodating Incoming Signals Via Ac-coupling Or Dc-coupling
App 20140256276 - Li; Miao ; et al. | 2014-09-11 |
Low power all digital PLL architecture
Grant 8,830,001 - Zhuang , et al. September 9, 2 | 2014-09-09 |
Methods And Devices For Matching Transmission Line Characteristics Using Stacked Metal Oxide Semiconductor (mos) Transistors
App 20140111250 - Li; Miao ; et al. | 2014-04-24 |
RESETTABLE VOLTAGE CONTROLLED OSCILLATORS (VCOs) FOR CLOCK AND DATA RECOVERY (CDR) CIRCUITS, AND RELATED SYSTEMS AND METHODS
App 20130216003 - Zhuang; Jingcheng ; et al. | 2013-08-22 |
Low-hysteresis high-speed differential sampler
Grant 8,497,723 - Zhuang July 30, 2 | 2013-07-30 |
Dual Mode Clock/data Recovery Circuit
App 20130191679 - Zhuang; Jingcheng ; et al. | 2013-07-25 |
Compensating for wander in AC coupling data interface
Grant 8,461,896 - Zhuang June 11, 2 | 2013-06-11 |
Low-hysteresis High-speed Differential Sampler
App 20130127507 - Zhuang; Jingcheng | 2013-05-23 |
Passive filter and AC coupler receiver interface
Grant 8,319,579 - Zhuang , et al. November 27, 2 | 2012-11-27 |
Fractional interpolative timing advance and retard control in a transceiver
Grant 8,306,174 - Murphy , et al. November 6, 2 | 2012-11-06 |
Bandwidth reduction mechanism for polar modulation
Grant 8,204,107 - Zhuang , et al. June 19, 2 | 2012-06-19 |
Compensating For Wander In Ac Coupling Data Interface
App 20120133414 - Zhuang; Jingcheng | 2012-05-31 |
Passive Filter And Ac Coupler Receiver Interface
App 20120133459 - Zhuang; Jingcheng ; et al. | 2012-05-31 |
Binary ripple counter sampling with adjustable delays
Grant 8,045,662 - Zhuang , et al. October 25, 2 | 2011-10-25 |
Zero-delay serial communications circuitry for serial interconnects
Grant 8,014,480 - Zhuang , et al. September 6, 2 | 2011-09-06 |
Frequency synthesizer circuitry employing delay line
Grant 7,843,275 - Kwasniewski , et al. November 30, 2 | 2010-11-30 |
System and method for frequency pushing/pulling compensation
Grant 7,808,325 - Waheed , et al. October 5, 2 | 2010-10-05 |
Fractional Interpolative Timing Advance and Retard Control in a Transceiver
App 20100027729 - Murphy; Thomas Casimir ; et al. | 2010-02-04 |
Digital loop circuit for programmable logic device
Grant 7,633,322 - Zhuang , et al. December 15, 2 | 2009-12-15 |
System and Method for Frequency Pushing/Pulling Compensation
App 20090268791 - Waheed; Khurram ; et al. | 2009-10-29 |
Bandwidth Reduction Mechanism For Polar Modulation
App 20090258612 - Zhuang; Jingcheng ; et al. | 2009-10-15 |
Capacitance switch circuitry for digitally controlled oscillators
Grant 7,474,167 - Zhuang , et al. January 6, 2 | 2009-01-06 |
Low Power All Digital PLL Architecture
App 20080315959 - Zhuang; Jingcheng ; et al. | 2008-12-25 |
| 