loadpatents
name:-0.16433000564575
name:-0.13311910629272
name:-0.10605192184448
ZHUANG; Hui-Zhong Patent Filings

ZHUANG; Hui-Zhong

Patent Applications and Registrations

Patent applications and USPTO patent grants for ZHUANG; Hui-Zhong.The latest application filed is for "amphi-fet structure, method of making and method of designing".

Company Profile
112.120.174
  • ZHUANG; Hui-Zhong - Hsinchu TW
  • ZHUANG; Hui-Zhong - Kaohsiung City TW
  • Zhuang; Hui-Zhong - Kaohsiung TW
  • Zhuang; Hui-Zhong - Tainan TW
  • Zhuang; Hui-Zhong - Tainan City TW
  • Zhuang; Hui-Zhong - Kaohsiun TW
  • ZHUANG; Hui-Zhong - Kaohsiun City 807 TW
  • Zhuang; Hui-Zhong - Kaohisung TW
  • ZHUANG; Hui-Zhong - Kaohisung City TW
  • Zhuang; Hui-Zhong - Kaoshung TW
  • Zhuang; Hui-Zhong - Kaoshung City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Amphi-fet Structure, Method Of Making And Method Of Designing
App 20220310591 - LAI; Chih-Yu ;   et al.
2022-09-29
Integrated Circuit
App 20220302111 - WU; Guo-Huei ;   et al.
2022-09-22
Semiconductor Device Including Recessed Interconnect Structure
App 20220302027 - Wu; Guo-Huei ;   et al.
2022-09-22
Semiconductor Device Including Recessed Interconnect Structure
App 20220302026 - Wu; Guo-Huei ;   et al.
2022-09-22
Semiconductor Structure And Method For Manufacturing The Same
App 20220293638 - WANG; POCHUN ;   et al.
2022-09-15
Integrated Circuit In Hybrid Row Height Structure
App 20220293470 - KAO; Jerry Chang-Jui ;   et al.
2022-09-15
Variable Width Nano-sheet Field-effect Transistor Cell Structure
App 20220292244 - Lai; Wei-An ;   et al.
2022-09-15
Semiconductor Device And Integrated Circuit In Hybrid Row Height Structure
App 20220293469 - KAO; Jerry Chang-Jui ;   et al.
2022-09-15
Semiconductor device including recessed interconnect structure
Grant 11,444,018 - Wu , et al. September 13, 2
2022-09-13
Multi-bit structure
Grant 11,444,071 - Chien , et al. September 13, 2
2022-09-13
Variable width nano-sheet field-effect transistor cell structure
Grant 11,429,774 - Lai , et al. August 30, 2
2022-08-30
Semiconductor structure and layout method of a semiconductor structure
Grant 11,417,588 - Chen , et al. August 16, 2
2022-08-16
Integrated circuit and method of manufacturing same
Grant 11,409,938 - Chiang , et al. August 9, 2
2022-08-09
Low-power Flip-flop Architecture With High-speed Transmission Gates
App 20220239286 - CHIEN; Yung-Chen ;   et al.
2022-07-28
Layout method of a semiconductor device and associated system
Grant 11,392,747 - Xu , et al. July 19, 2
2022-07-19
Integrated Circuit Layouts With Source And Drain Contacts Of Different Widths
App 20220208976 - CIOU; Shang-Syuan ;   et al.
2022-06-30
Integrated circuit
Grant 11,374,003 - Wu , et al. June 28, 2
2022-06-28
Semiconductor structure and method for manufacturing the same
Grant 11,362,110 - Wang , et al. June 14, 2
2022-06-14
Integrated circuit in hybrid row height structure
Grant 11,355,395 - Kao , et al. June 7, 2
2022-06-07
Manufacturing Method Of An Input Circuit Of A Flip-flop
App 20220173726 - XU; JIN-WEI ;   et al.
2022-06-02
Semiconductor Device And Methods Of Manufacturing Same
App 20220130760 - WU; Guo-Huei ;   et al.
2022-04-28
Cell structure with intermediate metal layers for power supplies
Grant 11,315,874 - Tien , et al. April 26, 2
2022-04-26
Reduced Area Standard Cell Abutment Configurations
App 20220114322 - LU; Chi-Yu ;   et al.
2022-04-14
Integrated circuit layouts with source and drain contacts of different widths
Grant 11,302,787 - Ciou , et al. April 12, 2
2022-04-12
Input circuit of a flip-flop and associated manufacturing method
Grant 11,296,682 - Xu , et al. April 5, 2
2022-04-05
Cell layout and structure
Grant 11,281,835 - Hsieh , et al. March 22, 2
2022-03-22
Cell Structure With Intermediate Metal Layers For Power Supplies
App 20220084945 - Tien; Li-Chun ;   et al.
2022-03-17
Interconnect Structure In Semiconductor Device And Method Of Forming The Same
App 20220077059 - WU; GUO-HUEI ;   et al.
2022-03-10
Structure And Method Of Non-rectangular Cell In Semiconductor Device
App 20220067259 - WANG; POCHUN ;   et al.
2022-03-03
Semiconductor Device With V2v Rail And Methods Of Making Same
App 20220068816 - YANG; Jung-Chan ;   et al.
2022-03-03
Semiconductor Structure And Layout Method Of A Semiconductor Structure
App 20220037233 - CHEN; WEI-REN ;   et al.
2022-02-03
Integrated circuit layout and method of configuring the same
Grant 11,239,228 - Lin , et al. February 1, 2
2022-02-01
Multi-bit standard cell
Grant 11,227,084 - Kao , et al. January 18, 2
2022-01-18
Reduced area standard cell abutment configurations
Grant 11,216,608 - Lu , et al. January 4, 2
2022-01-04
Integrated Circuit Device And Method
App 20210407985 - CHEN; Chih-Liang ;   et al.
2021-12-30
Multi-bit Structure
App 20210407986 - CHIEN; Shao-Lun ;   et al.
2021-12-30
Footprint For Multi-bit Flip Flop
App 20210391850 - WANG; Po-Chun ;   et al.
2021-12-16
Integrated Circuit And Method Of Manufacturing Same
App 20210383054 - PENG; Shih-Wei ;   et al.
2021-12-09
Integrated Circuit
App 20210384187 - LI; Jian-Sing ;   et al.
2021-12-09
Integrated Circuit Structure
App 20210374323 - ZHUANG; Hui-Zhong ;   et al.
2021-12-02
Ic Device Manufacturing Method
App 20210374315 - PENG; Shih-Wei ;   et al.
2021-12-02
Integrated circuit, system, and method of forming the same
Grant 11,188,703 - Huang , et al. November 30, 2
2021-11-30
Integrated Circuit
App 20210366774 - KAO; Jerry Chang-Jui ;   et al.
2021-11-25
Odd-fin height cell regions, semiconductor device having the same, and method of generating a layout diagram corresponding to the same
Grant 11,177,256 - Zhuang , et al. November 16, 2
2021-11-16
Power Rail With Non-linear Edge
App 20210350062 - YANG; Jung-Chan ;   et al.
2021-11-11
Semiconductor Device And Method Of Manufacturing The Same
App 20210343715 - WU; Guo-Huei ;   et al.
2021-11-04
Semiconductor Device And Layout Design Thereof
App 20210343636 - Lin; Chung-Te ;   et al.
2021-11-04
Multiple fin count layout, method, system, and device
Grant 11,151,297 - Lai , et al. October 19, 2
2021-10-19
Input Circuit Of A Flip-flop And Associated Manufacturing Method
App 20210313972 - XU; JIN-WEI ;   et al.
2021-10-07
Integrated Circuit Having Fins Crossing Cell Boundary
App 20210313319 - SUE; Pin-Dai ;   et al.
2021-10-07
Semiconductor device with filler cell region, method of generating layout diagram and system for same
Grant 11,138,360 - Huang , et al. October 5, 2
2021-10-05
Flip-flop With Delineated Layout For Reduced Footprint
App 20210297068 - Liu; Chi-Lin ;   et al.
2021-09-23
IC layout, method, device, and system
Grant 11,126,775 - Peng , et al. September 21, 2
2021-09-21
Double Height Cell Regions, Semiconductor Device Having The Same, And Method Of Generating A Layout Diagram Corresponding To The Same
App 20210288144 - YANG; Jung-Chan ;   et al.
2021-09-16
Inverted Integrated Circuit And Method Of Forming The Same
App 20210279397 - WANG; Pochun ;   et al.
2021-09-09
Integrated Circuit Having Angled Conductive Feature
App 20210280572 - HSIEH; Tung-Heng ;   et al.
2021-09-09
Semiconductor Structure
App 20210280608 - CHOU; HSUEH-CHIH ;   et al.
2021-09-09
Multiple Fin Count Layout, Method, System, And Device
App 20210271797 - LAI; Po-Chia ;   et al.
2021-09-02
Semiconductor Device Including Recessed Interconnect Structure
App 20210272895 - Wu; Guo-Huei ;   et al.
2021-09-02
Metal Cut Optimization For Standard Cells
App 20210271794 - Lei; Cheok-Kei ;   et al.
2021-09-02
Integrated circuit
Grant 11,107,805 - Li , et al. August 31, 2
2021-08-31
Integrated circuit and method of manufacturing same
Grant 11,100,273 - Peng , et al. August 24, 2
2021-08-24
Power rail with non-linear edge
Grant 11,093,684 - Yang , et al. August 17, 2
2021-08-17
Semiconductor device and layout design thereof
Grant 11,088,067 - Lin , et al. August 10, 2
2021-08-10
Buried Metal Track and Methods Forming Same
App 20210242212 - Wang; Pochun ;   et al.
2021-08-05
Method for improved cut metal patterning
Grant 11,080,461 - Chang , et al. August 3, 2
2021-08-03
Semiconductor device including a conductive feature over an active region
Grant 11,075,164 - Hsieh , et al. July 27, 2
2021-07-27
Clock Gating Circuit And Method Of Operating The Same
App 20210226615 - RASOULI; Hadi ;   et al.
2021-07-22
Method And System For Generating Layout Diagram For Semiconductor Device Having Engineering Change Order (eco) Cells
App 20210224444 - CHIU; Mao-Wei ;   et al.
2021-07-22
Semiconductor device and method of manufacturing the same
Grant 11,063,045 - Wu , et al. July 13, 2
2021-07-13
Integrated Circuit Layout Method And System
App 20210209284 - LI; Jian-Sing ;   et al.
2021-07-08
System and Method for Transistor Placement in Standard Cell Layout
App 20210200927 - Lei; Cheok-Kei ;   et al.
2021-07-01
Layout Architecture For A Cell
App 20210202466 - Peng; Shi-Wei ;   et al.
2021-07-01
Flip-flop with delineated layout for reduced footprint
Grant 11,050,415 - Liu , et al. June 29, 2
2021-06-29
Integrated circuit and method of manufacturing the same
Grant 11,048,849 - Wang , et al. June 29, 2
2021-06-29
Capacitive Isolation Structure Insert For Reversed Signals
App 20210192118 - LEI; Cheok-Kei ;   et al.
2021-06-24
Semiconductor structure
Grant 11,037,957 - Chou , et al. June 15, 2
2021-06-15
Metal cut optimization for standard cells
Grant 11,030,368 - Lei , et al. June 8, 2
2021-06-08
Semiconductor device including a conductive feature over an active region
Grant 11,031,334 - Hsieh , et al. June 8, 2
2021-06-08
Integrated circuit having angled conductive feature
Grant 11,024,622 - Hsieh , et al. June 1, 2
2021-06-01
Buried metal track and methods forming same
Grant 11,004,855 - Wang , et al. May 11, 2
2021-05-11
Semiconductor Structure
App 20210134783 - LI; JIAN-SING ;   et al.
2021-05-06
Semiconductor Device
App 20210134947 - YANG; JUNG-CHAN ;   et al.
2021-05-06
Layout Method Of A Semiconductor Device And Associated System
App 20210133386 - XU; JIN-WEI ;   et al.
2021-05-06
Integrated Circuit And Method Of Manufacturing Same
App 20210124866 - CHIANG; Ting-Wei ;   et al.
2021-04-29
Integrated Circuit Structure And Method Of Forming The Same
App 20210118868 - SIO; Kam-Tou ;   et al.
2021-04-22
Double height cell regions, semiconductor device having the same, and method of generating a layout diagram corresponding to the same
Grant 10,971,586 - Yang , et al. April 6, 2
2021-04-06
Integrated circuit layout method, device, and system
Grant 10,970,451 - Li , et al. April 6, 2
2021-04-06
Method and system for generating layout diagram for semiconductor device having engineering change order (ECO) cells
Grant 10,970,440 - Chiu , et al. April 6, 2
2021-04-06
Double Rule Integrated Circuit Layouts For A Dual Transmission Gate
App 20210098453 - PENG; Shih-Wei ;   et al.
2021-04-01
Semiconductor Structure And Method For Manufacturing The Same
App 20210098500 - WANG; POCHUN ;   et al.
2021-04-01
Integrated Circuit And Method Of Forming An Integrated Circuit
App 20210097225 - ZHUANG; Hui-Zhong ;   et al.
2021-04-01
Isolation Circuit Between Power Domains
App 20210089700 - LU; Chi-Yu ;   et al.
2021-03-25
System For Designing Integrated Circuit Layout And Method Of Making The Integrated Circuit Layout
App 20210089698 - HSIEH; Shang-Chih ;   et al.
2021-03-25
Semiconductor Device Having Fin Structure
App 20210091066 - CHEN; SHUN-LI ;   et al.
2021-03-25
Integrated Circuit, System For And Method Of Forming An Integrated Circuit
App 20210082739 - YANG; Jung-Chan ;   et al.
2021-03-18
Integrated circuit and method of fabricating the same
Grant 10,950,594 - Lin , et al. March 16, 2
2021-03-16
Capacitive isolation structure insert for reversed signals
Grant 10,943,050 - Lei , et al. March 9, 2
2021-03-09
Method For Improved Cut Metal Patterning
App 20210004518 - CHANG; Kuang-Ching ;   et al.
2021-01-07
Hybrid Fin Field-Effect Transistor Cell Structures and Related Methods
App 20210005634 - Lai; Wei-An ;   et al.
2021-01-07
Hybrid Fin Field-Effect Transistor Cell Structures and Related Methods
App 20210005633 - Lai; Wei-An ;   et al.
2021-01-07
Integrated circuit and method of manufacturing same
Grant 10,885,254 - Chiang , et al. January 5, 2
2021-01-05
Integrated circuit, system for and method of forming an integrated circuit
Grant 10,879,229 - Sio , et al. December 29, 2
2020-12-29
Tie Off Device
App 20200402979 - Chien; Shao-Lun ;   et al.
2020-12-24
Semiconductor Layout With Different Row Heights
App 20200402968 - ZHUANG; Hui-Zhong ;   et al.
2020-12-24
Integrated circuit designing system
Grant 10,867,100 - Hsieh , et al. December 15, 2
2020-12-15
System for designing integrated circuit layout and method of making the integrated circuit layout
Grant 10,867,099 - Hsieh , et al. December 15, 2
2020-12-15
Isolation circuit between power domains
Grant 10,867,104 - Lu , et al. December 15, 2
2020-12-15
Integrated circuit and method of forming an integrated circuit
Grant 10,867,114 - Zhuang , et al. December 15, 2
2020-12-15
Double rule integrated circuit layouts for a dual transmission gate
Grant 10,868,008 - Peng , et al. December 15, 2
2020-12-15
Semiconductor device having fin structure
Grant 10,867,986 - Chen , et al. December 15, 2
2020-12-15
Integrated circuit, system for and method of forming an integrated circuit
Grant 10,854,499 - Yang , et al. December 1, 2
2020-12-01
Integrated Circuit, System For And Method Of Forming An Integrated Circuit
App 20200357793 - SIO; Kam-Tou ;   et al.
2020-11-12
Integrated Circuit And Method Of Manufacturing Same
App 20200350250 - WANG; Pochun ;   et al.
2020-11-05
Integrated Circuit Layout and Method of Configuring the Same
App 20200335489 - Lin; Chung-Te ;   et al.
2020-10-22
Semiconductor Device and Layout Design Thereof
App 20200328148 - Lin; Chung-Te ;   et al.
2020-10-15
Ic Layout, Method, Device, And System
App 20200327273 - PENG; Shih-Wei ;   et al.
2020-10-15
Integrated Circuit
App 20200328201 - LI; Jian-Sing ;   et al.
2020-10-15
Integrated Circuit
App 20200328210 - WU; Guo-Huei ;   et al.
2020-10-15
Semiconductor Device And Method Of Manufacturing The Same
App 20200328212 - WU; Guo-Huei ;   et al.
2020-10-15
Integrated Circuit, System For And Method Of Forming An Integrated Circuit
App 20200320244 - YANG; Jung-Chan ;   et al.
2020-10-08
Hybrid fin field-effect transistor cell structures and related methods
Grant 10,797,078 - Lai , et al. October 6, 2
2020-10-06
Method And System For Generating Layout Diagram For Semiconductor Device Having Engineering Change Order (eco) Cells
App 20200302101 - CHIU; Mao-Wei ;   et al.
2020-09-24
Method for improved cut metal patterning
Grant 10,783,313 - Chang , et al. Sept
2020-09-22
Metal Cut Optimization For Standard Cells
App 20200285792 - LEI; Cheok-Kei ;   et al.
2020-09-10
Layout For Integrated Circuit And The Integrated Circuit
App 20200285797 - LEI; CHEOK-KEI ;   et al.
2020-09-10
Semiconductor Structure
App 20200286919 - CHOU; HSUEH-CHIH ;   et al.
2020-09-10
Cell Layout and Structure
App 20200257842 - Hsieh; Tung-Heng ;   et al.
2020-08-13
Integrated circuit, system for and method of forming an integrated circuit
Grant 10,740,531 - Yang , et al. A
2020-08-11
Integrated circuit and method of manufacturing same
Grant 10,734,321 - Wang , et al.
2020-08-04
Integrated circuit, system for and method of forming an integrated circuit
Grant 10,734,377 - Sio , et al.
2020-08-04
Semiconductor device and layout design thereof
Grant 10,727,177 - Lin , et al.
2020-07-28
Integrated circuit layout and method of configuring the same
Grant 10,707,199 - Lin , et al.
2020-07-07
Metal cut optimization for standard cells
Grant 10,691,849 - Lei , et al.
2020-06-23
Semiconductor structure
Grant 10,685,982 - Chou , et al.
2020-06-16
Layout for integrated circuit and the integrated circuit
Grant 10,685,162 - Lei , et al.
2020-06-16
Semiconductor device having engineering change order (ECO) cells
Grant 10,678,977 - Chiu , et al.
2020-06-09
Cell layout and structure
Grant 10,664,639 - Hsieh , et al.
2020-05-26
Multi-bit Standard Cell
App 20200151297 - KAO; JERRY CHANG JUI ;   et al.
2020-05-14
Integrated Circuit And Method Of Manufacturing The Same
App 20200134123 - WANG; Pochun ;   et al.
2020-04-30
Semiconductor Device With Filler Cell Region, Method Of Generating Layout Diagram And System For Same
App 20200134125 - HUANG; Po-Hsiang ;   et al.
2020-04-30
Integrated Circuit Layouts With Source And Drain Contacts Of Different Widths
App 20200135869 - Ciou; Shang-Syuan ;   et al.
2020-04-30
Power Rail With Non-linear Edge
App 20200134133 - YANG; Jung-Chan ;   et al.
2020-04-30
Reduced Area Standard Cell Abutment Configurations
App 20200134126 - LU; Chi-Yu ;   et al.
2020-04-30
Double Rule Integrated Circuit Layouts For A Dual Transmission Gate
App 20200135732 - PENG; Shih-Wei ;   et al.
2020-04-30
Capacitive Isolation Structure Insert For Reversed Signals
App 20200134130 - LEI; Cheok-Kei ;   et al.
2020-04-30
Integrated Circuit Having Angled Conductive Feature
App 20200126966 - HSIEH; Tung-Heng ;   et al.
2020-04-23
Integrated Circuit Layout Method, Device, And System
App 20200104446 - LI; Jian-Sing ;   et al.
2020-04-02
Integrated Circuit, System, And Method Of Forming The Same
App 20200104451 - HUANG; Sang-Chi ;   et al.
2020-04-02
Flip-flop With Delineated Layout For Reduced Footprint
App 20200099369 - Liu; Chi-Lin ;   et al.
2020-03-26
Integrated Circuit And Method Of Manufacturing Same
App 20200074044 - Peng; Shih-Wei ;   et al.
2020-03-05
Isolation Circuit Between Power Domains
App 20200074039 - LU; Chi-Yu ;   et al.
2020-03-05
Method For Improved Cut Metal Patterning
App 20200074043 - CHANG; Kuang-Ching ;   et al.
2020-03-05
Semiconductor Device including a Conductive Feature Over an Active Region
App 20200075476 - Hsieh; Tung-Heng ;   et al.
2020-03-05
Hybrid Fin Field-Effect Transistor Cell Structures and Related Methods
App 20200058681 - Lai; Wei-An ;   et al.
2020-02-20
Semiconductor device having engineering change order (ECO) cells and method of using
Grant 10,553,575 - Tien , et al. Fe
2020-02-04
Integrated Circuit And Method Of Forming An Integrated Circuit
App 20200034512 - ZHUANG; Hui-Zhong ;   et al.
2020-01-30
Flip-flop with delineated layout for reduced footprint
Grant 10,530,345 - Liu , et al. J
2020-01-07
Double Rule Integrated Circuit Layouts For A Dual Transmission Gate
App 20200006338 - PENG; Shih-Wei ;   et al.
2020-01-02
Semiconductor Device Including a Conductive Feature Over an Active Region
App 20200006217 - Hsieh; Tung-Heng ;   et al.
2020-01-02
Double Height Cell Regions, Semiconductor Device Having The Same, And Method Of Generating A Layout Diagram Corresponding To The
App 20200006481 - YANG; Jung-Chan ;   et al.
2020-01-02
Odd-fin Height Cell Regions, Semiconductor Device Having The Same, And Method Of Generating A Layout Diagram Corresponding To Th
App 20200006335 - ZHUANG; Hui-Zhong ;   et al.
2020-01-02
Double rule integrated circuit layouts for a dual transmission gate
Grant 10,522,542 - Peng , et al. Dec
2019-12-31
System and method of processing cutting layout and example switching circuit
Grant 10,522,527 - Hsieh , et al. Dec
2019-12-31
Semiconductor device including a conductive feature over an active region
Grant 10,504,837 - Hsieh , et al. Dec
2019-12-10
Integrated circuit and method of manufacturing same
Grant 10,503,863 - Peng , et al. Dec
2019-12-10
Buried Metal Track and Methods Forming Same
App 20190341387 - Wang; Pochun ;   et al.
2019-11-07
Integrated Circuit Designing System
App 20190332736 - HSIEH; Shang-Chih ;   et al.
2019-10-31
Buried metal track and methods forming same
Grant 10,446,555 - Wang , et al. Oc
2019-10-15
Method For Generating Layout Diagram Including Wiring Arrangement
App 20190286784 - CHANG; Fong-Yuan ;   et al.
2019-09-19
Integrated Circuit and Method of Fabricating the Same
App 20190279975 - Lin; Chung-Te ;   et al.
2019-09-12
System For Designing Integrated Circuit Layout And Method Of Making The Integrated Circuit Layout
App 20190258768 - HSIEH; Shang-Chih ;   et al.
2019-08-22
Integrated Circuit And Method Of Manufacturing Same
App 20190251225 - CHIANG; Ting-Wei ;   et al.
2019-08-15
Integrated Circuit Layout and Method of Configuring the Same
App 20190252367 - Lin; Chung-Te ;   et al.
2019-08-15
Layout of standard cells for predetermined function in integrated circuits
Grant 10,380,306 - Hsieh , et al. A
2019-08-13
Integrated circuit and method of forming an integrated circuit
Grant 10,380,315 - Zhuang , et al. A
2019-08-13
Flip-flop With Delineated Layout For Reduced Footprint
App 20190229715 - Liu; Chi-Lin ;   et al.
2019-07-25
Semiconductor device with fill cells
Grant 10,331,838 - Yang , et al.
2019-06-25
Semiconductor Device Having Fin Structure
App 20190189609 - CHEN; SHUN-LI ;   et al.
2019-06-20
Integrated circuit and method of fabricating the same
Grant 10,325,900 - Lin , et al.
2019-06-18
Semiconductor Structure
App 20190164992 - CHOU; HSUEH-CHIH ;   et al.
2019-05-30
Integrated circuit and method of manufacturing same
Grant 10,296,694 - Chiang , et al.
2019-05-21
Semiconductor Device Having Engineering Change Order (eco) Cells
App 20190147132 - CHIU; Mao-Wei ;   et al.
2019-05-16
System for designing integrated circuit layout and method of making the integrated circuit layout
Grant 10,289,789 - Hsieh , et al.
2019-05-14
Semiconductor device layout
Grant 10,277,227 - Sue , et al.
2019-04-30
Layout For Integrated Circuit And The Integrated Circuit
App 20190121931 - LEI; CHEOK-KEI ;   et al.
2019-04-25
Integrated circuit layout and method of configuring the same
Grant 10,269,784 - Lin , et al.
2019-04-23
Flip-flop with delineated layout for reduced footprint
Grant 10,270,432 - Liu , et al.
2019-04-23
Integrated Circuit, System For And Method Of Forming An Integrated Circuit
App 20190102503 - YANG; Jung-Chan ;   et al.
2019-04-04
Metal Cut Optimization for Standard Cells
App 20190095552 - LEI; Cheok-Kei ;   et al.
2019-03-28
Integrated Circuit And Method Of Manufacturing Same
App 20190096811 - WANG; Pochun ;   et al.
2019-03-28
Integrated Circuit And Method Of Manufacturing Same
App 20190065658 - PENG; Shih-Wei ;   et al.
2019-02-28
Buried Metal Track and Methods Forming Same
App 20190067290 - Wang; Pochun ;   et al.
2019-02-28
Semiconductor Device and Layout Design Thereof
App 20190067185 - Lin; Chung-Te ;   et al.
2019-02-28
Layout method for integrated circuit and layout of the integrated circuit
Grant 10,163,883 - Lei , et al. Dec
2018-12-25
Integrated circuit and method of fabricating the same
Grant 10,163,880 - Lin , et al. Dec
2018-12-25
Semiconductor devices with cells comprising routing resources
Grant 10,157,902 - Chiu , et al. Dec
2018-12-18
Circuits and structures including tap cells and fabrication methods thereof
Grant 10,157,910 - Xu , et al. Dec
2018-12-18
Semiconductor device and layout design thereof
Grant 10,141,256 - Lin , et al. Nov
2018-11-27
Integrated Circuit and Method of Fabricating the Same
App 20180337167 - Lin; Chung-Te ;   et al.
2018-11-22
Standard cell layout, semiconductor device having engineering change order (ECO) cells and method
Grant 10,127,340 - Chiu , et al. November 13, 2
2018-11-13
Cell Layout and Structure
App 20180253522 - Hsieh; Tung-Heng ;   et al.
2018-09-06
Semiconductor Device With Fill Cells
App 20180165399 - YANG; Jung-Chan ;   et al.
2018-06-14
Semiconductor device, layout of semiconductor device, and method of manufacturing semiconductor device
Grant 9,991,158 - Hsieh , et al. June 5, 2
2018-06-05
Integrated Circuit, System For And Method Of Forming An Integrated Circuit
App 20180151559 - SIO; Kam-Tou ;   et al.
2018-05-31
Integrated Circuit, System For And Method Of Forming An Integrated Circuit
App 20180150589 - YANG; Jung-Chan ;   et al.
2018-05-31
Integrated Circuit, System For And Method Of Forming An Integrated Circuit
App 20180151411 - YANG; Jung-Chan ;   et al.
2018-05-31
Cell layout and structure
Grant 9,984,191 - Hsieh , et al. May 29, 2
2018-05-29
Standard Cell Layout, Semiconductor Device Having Engineering Change Order (eco) Cells And Method
App 20180096981 - CHIU; Mao-Wei ;   et al.
2018-04-05
Integrated Circuit And Method Of Forming An Integrated Circuit
App 20180075182 - ZHUANG; Hui-Zhong ;   et al.
2018-03-15
Semiconductor Device Having Engineering Change Order (eco) Cells And Method Of Using
App 20180076190 - TIEN; Li-Chun ;   et al.
2018-03-15
Method of forming layout design
Grant 9,899,263 - Hsieh , et al. February 20, 2
2018-02-20
Integrated Circuit And Method Of Manufacturing Same
App 20180004884 - CHIANG; Ting-Wei ;   et al.
2018-01-04
Integrated Circuit Layout And Method Of Configuring The Same
App 20180006009 - LIN; Chung-Te ;   et al.
2018-01-04
Layout Method For Integrated Circuit And Layout Of The Integrated Circuit
App 20170365592 - LEI; CHEOK-KEI ;   et al.
2017-12-21
Cell grid architecture for FinFET technology
Grant 9,846,757 - Zhuang , et al. December 19, 2
2017-12-19
Semiconductor Device Layout
App 20170346490 - Sue; Pin-Dai ;   et al.
2017-11-30
Semiconductor Devices With Cells Comprising Routing Resources
App 20170345810 - CHIU; MAO-WEI ;   et al.
2017-11-30
Standard cell layout, semiconductor device having engineering change order (ECO) cells and method
Grant 9,831,230 - Tien , et al. November 28, 2
2017-11-28
Integrated Circuit And Method Of Fabricating The Same
App 20170323877 - LIN; Chung-Te ;   et al.
2017-11-09
Flip-flop With Delineated Layout For Reduced Footprint
App 20170317666 - Liu; Chi-Lin ;   et al.
2017-11-02
Integrated circuit with elongated coupling
Grant 9,806,071 - Hsieh , et al. October 31, 2
2017-10-31
Semiconductor Device And Layout Design Thereof
App 20170309562 - LIN; Chung-Te ;   et al.
2017-10-26
System and method of layout design for integrated circuits
Grant 9,767,243 - Chiang , et al. September 19, 2
2017-09-19
System For Designing Integrated Circuit Layout And Method Of Making The Integrated Circuit Layout
App 20170255739 - HSIEH; Shang-Chih ;   et al.
2017-09-07
Circuits and Structures Including Tap Cells and Fabrication Methods Thereof
App 20170194319 - XU; JIN-WEI ;   et al.
2017-07-06
Layout architecture for performance improvement
Grant 9,691,666 - Lu , et al. June 27, 2
2017-06-27
Integrated circuit with well and substrate contacts
Grant 9,679,915 - Kuo , et al. June 13, 2
2017-06-13
Standard cell having cell height being non-integral multiple of nominal minimum pitch
Grant 9,659,129 - Hsieh , et al. May 23, 2
2017-05-23
Method and layout of an integrated circuit
Grant 9,653,393 - Chen , et al. May 16, 2
2017-05-16
Flip-flop with delineated layout for reduced footprint
Grant 9,641,161 - Liu , et al. May 2, 2
2017-05-02
Method and system of forming layout design
Grant 9,626,472 - Chiang , et al. April 18, 2
2017-04-18
Layout Of Standard Cells For Predetermined Function In Integrated Circuits
App 20170068767 - HSIEH; Shang-Chih ;   et al.
2017-03-09
Cell Grid Architecture For Finfet Technology
App 20170061056 - ZHUANG; Hui-Zhong ;   et al.
2017-03-02
Method and system of layout placement based on multilayer gridlines
Grant 9,536,032 - Chiang , et al. January 3, 2
2017-01-03
Integrated Circuit with Elongated Coupling
App 20160358902 - Hsieh; Tung-Heng ;   et al.
2016-12-08
System And Method Of Processing Cutting Layout And Example Switching Circuit
App 20160351555 - HSIEH; Tung-Heng ;   et al.
2016-12-01
Semiconductor Device and Method of Manufacturing Semiconductor Device
App 20160343656 - Hsieh; Tung-Heng ;   et al.
2016-11-24
Standard cells for predetermined function having different types of layout
Grant 9,501,600 - Hsieh , et al. November 22, 2
2016-11-22
Integrated Circuit With Well And Substrate Contacts
App 20160336343 - KUO; Ming-Zhang ;   et al.
2016-11-17
Method of Forming Layout Design
App 20160254190 - Hsieh; Tung-Heng ;   et al.
2016-09-01
Layout Architecture for Performance Improvement
App 20160254194 - Lu; Lee-Chung ;   et al.
2016-09-01
System and method of processing cutting layout and example switching circuit
Grant 9,431,381 - Hsieh , et al. August 30, 2
2016-08-30
Integrated circuit with elongated coupling
Grant 9,425,141 - Hsieh , et al. August 23, 2
2016-08-23
Semiconductor device and method of manufacturing semiconductor device
Grant 9,412,700 - Hsieh , et al. August 9, 2
2016-08-09
Method And System Of Forming Layout Design
App 20160147926 - CHIANG; Ting-Wei ;   et al.
2016-05-26
Method And System Of Forming Layout Design
App 20160147927 - CHIANG; Ting-Wei ;   et al.
2016-05-26
Layout architecture for performance improvement
Grant 9,337,290 - Lu , et al. May 10, 2
2016-05-10
Method of forming layout design
Grant 9,336,348 - Hsieh , et al. May 10, 2
2016-05-10
Semiconductor Device And Method Of Manufacturing Semiconductor Device
App 20160111370 - HSIEH; Tung-Heng ;   et al.
2016-04-21
Masks formed based on integrated circuit layout design having cell that includes extended active region
Grant 9,317,646 - Lu , et al. April 19, 2
2016-04-19
Integrated Circuit With Elongated Coupling
App 20160104674 - HSIEH; Tung-Heng ;   et al.
2016-04-14
System And Method Of Processing Cutting Layout And Example Switching Circuit
App 20160093603 - HSIEH; Tung-Heng ;   et al.
2016-03-31
Method Of Forming Layout Design
App 20160078164 - HSIEH; Tung-Heng ;   et al.
2016-03-17
Semiconductor Device, Layout Of Semiconductor Device, And Method Of Manufacturing Semiconductor Device
App 20160079162 - HSIEH; Tung-Heng ;   et al.
2016-03-17
Cell Layout and Structure
App 20160063166 - Hsieh; Tung-Heng ;   et al.
2016-03-03
Method and layout of an integrated circuit
Grant 9,245,887 - Chiang , et al. January 26, 2
2016-01-26
Multiple via connections using connectivity rings
Grant 9,213,795 - Hsu , et al. December 15, 2
2015-12-15
Masks Formed Based On Integrated Circuit Layout Design Having Cell That Includes Extended Active Region
App 20150356225 - LU; Lee-Chung ;   et al.
2015-12-10
System And Method Of Layout Design For Integrated Circuits
App 20150347659 - CHIANG; Ting-Wei ;   et al.
2015-12-03
Method for designing antenna cell that prevents plasma induced gate dielectric damage in semiconductor integrated circuits
Grant 9,202,696 - Yang , et al. December 1, 2
2015-12-01
Standard cell metal structure directly over polysilicon structure
Grant 9,158,877 - Hsieh , et al. October 13, 2
2015-10-13
Masks formed based on integrated circuit layout design having standard cell that includes extended active region
Grant 9,123,565 - Lu , et al. September 1, 2
2015-09-01
Integrated circuit
Grant 9,105,466 - Lu , et al. August 11, 2
2015-08-11
Layout of an integrated circuit
Grant 9,098,668 - Tien , et al. August 4, 2
2015-08-04
Cell layout design and method
Grant 9,087,170 - Hsu , et al. July 21, 2
2015-07-21
Method and Layout of an Integrated Circuit
App 20150171005 - Chen; Wei-Yu ;   et al.
2015-06-18
Layout Of An Integrated Circuit
App 20150149976 - Tien; Li-Chun ;   et al.
2015-05-28
Cell Layout Design And Method
App 20150067616 - HSU; Chin-Hsiung ;   et al.
2015-03-05
Standard Cell Layout, Semiconductor Device Having Engineering Change Order (eco) Cells And Method
App 20150048424 - TIEN; Li-Chun ;   et al.
2015-02-19
Method And Layout Of An Integrated Circuit
App 20150035070 - Chiang; Ting-Wei ;   et al.
2015-02-05
Method For Designing Antenna Cell That Prevents Plasma Induced Gate Dielectric Damage In Semiconductor Integrated Circuits
App 20150031194 - YANG; Jen-Hang ;   et al.
2015-01-29
Standard Cells For Predetermined Function Having Different Types Of Layout
App 20140327471 - HSIEH; Shang-Chih ;   et al.
2014-11-06
Standard Cell Having Cell Height Being Non-integral Multiple Of Nominal Minimum Pitch
App 20140327050 - HSIEH; Shang-Chih ;   et al.
2014-11-06
Standard Cell Metal Structure Directly Over Polysilicon Structure
App 20140327081 - HSIEH; Shang-Chih ;   et al.
2014-11-06
Antenna cell design to prevent plasma induced gate dielectric damage in semiconductor integrated circuits
Grant 8,872,269 - Yang , et al. October 28, 2
2014-10-28
Standard Cell Design Layout
App 20140298284 - Hsu; Chin-Hsiung ;   et al.
2014-10-02
Multiple via connections using connectivity rings
Grant 8,813,016 - Hsu , et al. August 19, 2
2014-08-19
Integrated Circuit Layout Design
App 20140183647 - LU; Lee-Chung ;   et al.
2014-07-03
Integrated Circuit
App 20140077270 - LU; Lee-Chung ;   et al.
2014-03-20
Layout Architecture for Performance Improvement
App 20140001595 - Lu; Lee-Chung ;   et al.
2014-01-02
Integrated circuits and methods of designing the same
Grant 8,607,172 - Lu , et al. December 10, 2
2013-12-10
Method and apparatus for improved multiplexing using tri-state inverter
Grant 8,482,314 - Chen , et al. July 9, 2
2013-07-09
Antenna Cell Design To Prevent Plasma Induced Gate Dielectric Damage In Semiconductor Integrated Circuits
App 20130146981 - YANG; Jen-Hang ;   et al.
2013-06-13
Method And Apparatus For Improved Multiplexing Using Tri-state Inverter
App 20130113520 - CHEN; Chun-Fu ;   et al.
2013-05-09
Integrated Circuits And Methods Of Designing The Same
App 20130087932 - LU; Lee-Chung ;   et al.
2013-04-11

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