Zhu Jinghui Trademarks & Logos

Patent Application	Date
METHOD AND APPARATUS FOR PROVIDING FIELD-PROGRAMMABLE GATE ARRAY (FPGA) INTEGRATED CIRCUIT (IC) PACKAGE 20220294451 - 17/828037 Jennings; Grant Thomas ; et al.	2022-09-15
METHOD AND SYSTEM FOR PROVIDING FPGA DEVICE IDENTIFICATION VIA A SET OF EMBEDDED SIGNATURE REGISTERS 20220209775 - 17/699043 Zhu; Jinghui	2022-06-30
METHODS AND APPARATUS FOR ORGANIZING A PROGRAMMABLE SEMICONDUCTOR DEVICE INTO MULTIPLE CLOCK REGIONS 20220083094 - 17/023145 Liu; Jianhua ; et al.	2022-03-17
METHOD AND SYSTEM FOR ENHANCING PROGRAMMABILITY OF A FIELD-PROGRAMMABLE GATE ARRAY VIA A DUAL-MODE PORT 20220027543 - 16/938798 Zhu; Jinghui ; et al.	2022-01-27
METHOD AND SYSTEM FOR ENHANCING PROGRAMMABILITY OF A FIELD-PROGRAMMABLE GATE ARRAY 20220027071 - 16/938771 Zhu; Jinghui ; et al.	2022-01-27
Method and system for providing a sleep mode to a configurable logic block using an intermittent power saving logic 11,385,709 - 17/233,344 Zhu July 12, 2	2022-07-12
Method and apparatus for providing field-programmable gate array (FPGA) integrated circuit (IC) package 11,368,156 - 17/334,985 Jennings , et al. June 21, 2	2022-06-21
Method and system providing FPGA device identification via a set of embedded signature registers 11,309,894 - 16/836,899 Zhu April 19, 2	2022-04-19
Methods and apparatus for providing a clock fabric for an FPGA organized in multiple clock regions 11,216,022 - 17/023,178 Liu , et al. January 4, 2	2022-01-04
System level integrated circuit chip 11,157,421 - 15/857,672 Zhu , et al. October 26, 2	2021-10-26

Patent Application

Date

METHOD AND APPARATUS FOR PROVIDING FIELD-PROGRAMMABLE GATE ARRAY (FPGA) INTEGRATED CIRCUIT (IC) PACKAGE
20220294451 - 17/828037 Jennings; Grant Thomas ; et al.

2022-09-15

METHOD AND SYSTEM FOR PROVIDING FPGA DEVICE IDENTIFICATION VIA A SET OF EMBEDDED SIGNATURE REGISTERS
20220209775 - 17/699043 Zhu; Jinghui

2022-06-30

METHODS AND APPARATUS FOR ORGANIZING A PROGRAMMABLE SEMICONDUCTOR DEVICE INTO MULTIPLE CLOCK REGIONS
20220083094 - 17/023145 Liu; Jianhua ; et al.

2022-03-17

METHOD AND SYSTEM FOR ENHANCING PROGRAMMABILITY OF A FIELD-PROGRAMMABLE GATE ARRAY VIA A DUAL-MODE PORT
20220027543 - 16/938798 Zhu; Jinghui ; et al.

2022-01-27

METHOD AND SYSTEM FOR ENHANCING PROGRAMMABILITY OF A FIELD-PROGRAMMABLE GATE ARRAY
20220027071 - 16/938771 Zhu; Jinghui ; et al.

2022-01-27

Method and system for providing a sleep mode to a configurable logic block using an intermittent power saving logic
11,385,709 - 17/233,344 Zhu July 12, 2

2022-07-12

Method and apparatus for providing field-programmable gate array (FPGA) integrated circuit (IC) package
11,368,156 - 17/334,985 Jennings , et al. June 21, 2

2022-06-21

Method and system providing FPGA device identification via a set of embedded signature registers
11,309,894 - 16/836,899 Zhu April 19, 2

2022-04-19

Methods and apparatus for providing a clock fabric for an FPGA organized in multiple clock regions
11,216,022 - 17/023,178 Liu , et al. January 4, 2

2022-01-04

System level integrated circuit chip
11,157,421 - 15/857,672 Zhu , et al. October 26, 2

2021-10-26

Mark Image Registration \| Serial	Trademark Application Date
"VICOTOCL" 90862530	VICOTOCL 2021-08-03

Mark Image

Registration | Serial

Trademark

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Zhu Jinghui

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