Zhao; Joe W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Zhao; Joe W..The latest application filed is for "increasing circuit speed and reducing circuit leakage by utilizing a local surface temperature effect".

Company Profile

0.18.0

Zhao; Joe W. - San Jose CA US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Increasing circuit speed and reducing circuit leakage by utilizing a local surface temperature effect Grant 8,402,412 - Chen , et al. March 19, 2	2013-03-19
Identifying non-randomness in integrated circuit product yield Grant 8,311,659 - Chen , et al. November 13, 2	2012-11-13
Estimating Icc current temperature scaling factor of an integrated circuit Grant 8,166,445 - Chen , et al. April 24, 2	2012-04-24
Method of metal pattern inspection verification Grant 8,000,519 - Zheng , et al. August 16, 2	2011-08-16
Method for monitoring and improving integrated circuit fabrication using FPGAs Grant 7,020,860 - Zhao , et al. March 28, 2	2006-03-28
Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same Grant 6,756,674 - Catabay , et al. June 29, 2	2004-06-29
Method to obtain a low resistivity and conformity chemical vapor deposition titanium film Grant 6,297,555 - Zhao , et al. October 2, 2	2001-10-02
Process to prevent stress cracking of dielectric films on semiconductor wafers Grant 6,232,658 - Catabay , et al. May 15, 2	2001-05-15
Plasma cleaning process for openings formed in at least one low dielectric constant insulation layer over copper metallization in integrated circuit structures Grant 6,204,192 - Zhao , et al. March 20, 2	2001-03-20
Process for abrasive removal of copper from the back surface of a silicon substrate Grant 6,059,637 - Pasch , et al. May 9, 2	2000-05-09
Process for treating damaged surfaces of low dielectric constant organo silicon oxide insulation material to inhibit moisture absorption Grant 6,028,015 - Wang , et al. February 22, 2	2000-02-22
Metal-filled via/contact opening with thin barrier layers in integrated circuit structure for fast response, and process for making same Grant 5,994,775 - Zhao , et al. November 30, 1	1999-11-30
Method for improvement of TiN CVD film quality Grant 5,956,613 - Zhao , et al. September 21, 1	1999-09-21
Low stress, highly conformal CVD metal thin film Grant 5,953,631 - Zhao , et al. September 14, 1	1999-09-14
Consistent alignment mark profiles on semiconductor wafers using PVD shadowing Grant 5,926,720 - Zhao , et al. July 20, 1	1999-07-20
Method of making a barrier layer for via or contact opening of integrated circuit structure Grant 5,770,520 - Zhao , et al. June 23, 1	1998-06-23
Plasma clean with hydrogen gas Grant 5,660,682 - Zhao , et al. August 26, 1	1997-08-26

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