Patent | Date |
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Integrate Stressor With Ge Photodiode Using A Substrate Removal Process App 20220165907 - ZHANG; Xunyuan ;   et al. | 2022-05-26 |
Fully aligned via in ground rule region Grant 11,114,338 - Licausi , et al. September 7, 2 | 2021-09-07 |
Optical Modulator Using Monocrystalline And Polycrystalline Silicon App 20210263351 - ZHANG; Xunyuan ;   et al. | 2021-08-26 |
Optical modulator using monocrystalline and polycrystalline silicon Grant 11,036,069 - Zhang , et al. June 15, 2 | 2021-06-15 |
Using an anti-reflection coating with a grating coupler Grant 11,022,757 - Zhang , et al. June 1, 2 | 2021-06-01 |
Using An Anti-reflection Coating With A Grating Coupler App 20210157033 - ZHANG; Xunyuan ;   et al. | 2021-05-27 |
Electro-optic modulator with monocrystalline semiconductor waveguides Grant 10,969,546 - Zhang , et al. April 6, 2 | 2021-04-06 |
Precision Spacing Control For Optical Waveguides App 20210072460 - ZHANG; Xunyuan | 2021-03-11 |
Optical Modulator App 20200301176 - ZHANG; Xunyuan ;   et al. | 2020-09-24 |
Devices and methods of forming low resistivity noble metal interconnect Grant 10,679,937 - Zhang , et al. | 2020-06-09 |
Electro-optic Modulator With Monocrystalline Semiconductor Waveguides App 20200158949 - ZHANG; Xunyuan ;   et al. | 2020-05-21 |
Repaired mask structures and resultant underlying patterned structures Grant 10,643,845 - Zhang , et al. | 2020-05-05 |
Skip via structures Grant 10,636,698 - Zhang , et al. | 2020-04-28 |
Methods of protecting structure of integrated circuit from rework Grant 10,636,656 - Sun , et al. | 2020-04-28 |
Metal insulator metal capacitor devices Grant 10,629,428 - Siddiqui , et al. | 2020-04-21 |
Overlay mark structures Grant 10,627,720 - Sun , et al. | 2020-04-21 |
Metal interconnects for super (skip) via integration Grant 10,573,593 - Lin , et al. Feb | 2020-02-25 |
IC structure with interface liner and methods of forming same Grant 10,553,478 - Zhang , et al. Fe | 2020-02-04 |
Methods of forming V0 structures for semiconductor devices by forming a protection layer with a non-uniform thickness Grant 10,546,854 - Xie , et al. Ja | 2020-01-28 |
Via and skip via structures Grant 10,485,111 - Law , et al. Nov | 2019-11-19 |
Methods Of Protecting Structure Of Integrated Circuit From Rework App 20190318927 - Sun; Lei ;   et al. | 2019-10-17 |
Fully Aligned Via In Ground Rule Region App 20190311948 - LICAUSI; Nicholas V. ;   et al. | 2019-10-10 |
Semiconductor device having a self-forming barrier layer at via bottom Grant RE47,630 - Zhao , et al. O | 2019-10-01 |
Metal Insulator Metal Capacitor Devices App 20190279860 - SIDDIQUI; Shariq ;   et al. | 2019-09-12 |
Fully aligned via in ground rule region Grant 10,366,919 - Licausi , et al. July 30, 2 | 2019-07-30 |
Skip Via Structures App 20190221473 - Zhang; Xunyuan ;   et al. | 2019-07-18 |
Back-end-of-line Structures With Air Gaps App 20190206718 - LiCausi; Nicholas V. ;   et al. | 2019-07-04 |
Repaired Mask Structures And Resultant Underlying Patterned Structures App 20190206682 - ZHANG; Xunyuan ;   et al. | 2019-07-04 |
Interconnects formed by a metal replacement process Grant 10,283,372 - Lin , et al. | 2019-05-07 |
Low resistance contacts to source or drain region of transistor Grant 10,283,608 - Zhang , et al. | 2019-05-07 |
Method of forming a vertical field effect transistor (VFET) and a VFET structure Grant 10,276,689 - Qi , et al. | 2019-04-30 |
Skip via structures Grant 10,262,892 - Zhang , et al. | 2019-04-16 |
Interconnects Formed By A Metal Replacement Process App 20190088500 - Lin; Sean Xuan ;   et al. | 2019-03-21 |
Fully Aligned Via In Ground Rule Region App 20190088541 - LICAUSI; Nicholas V. ;   et al. | 2019-03-21 |
Pre-spacer self-aligned cut formation Grant 10,236,256 - Zhang , et al. | 2019-03-19 |
Overlay Mark Structures App 20190056671 - Sun; Lei ;   et al. | 2019-02-21 |
Metal-insulator-metal capacitors with dielectric inner spacers Grant 10,211,147 - Zhang , et al. Feb | 2019-02-19 |
Self-aligned metal wire on contact structure and method for forming same Grant 10,199,271 - Xie , et al. Fe | 2019-02-05 |
Self aligned interconnect structures Grant 10,199,264 - Zhang , et al. Fe | 2019-02-05 |
Via and skip via structures Grant 10,199,261 - McMahon , et al. Fe | 2019-02-05 |
Via And Skip Via Structures App 20190027401 - McMahon; James ;   et al. | 2019-01-24 |
Via And Skip Via Structures App 20190021176 - Law; Shao Beng ;   et al. | 2019-01-17 |
Interconnects Formed With Structurally-modified Caps App 20190013240 - LiCausi; Nicholas V. ;   et al. | 2019-01-10 |
Metal-insulator-metal Capacitors With Dielectric Inner Spacers App 20190013269 - Zhang; Xunyuan ;   et al. | 2019-01-10 |
Non-mandrel cut formation Grant 10,163,633 - Law , et al. Dec | 2018-12-25 |
Method to form air-gap spacers and air-gap spacer-containing structures Grant 10,164,104 - Zhang , et al. Dec | 2018-12-25 |
Via and skip via structures Grant 10,157,833 - Zhang , et al. Dec | 2018-12-18 |
Method Of Forming A Vertical Field Effect Transistor (vfet) And A Vfet Structure App 20180358452 - QI; YI ;   et al. | 2018-12-13 |
Via And Skip Via Structures App 20180342454 - Zhang; Xunyuan ;   et al. | 2018-11-29 |
Ic Structure With Interface Liner And Methods Of Forming Same App 20180337126 - Zhang; Xunyuan ;   et al. | 2018-11-22 |
Middle-of-line Local Interconnect Structures With Hybrid Features App 20180308752 - Zhang; Xunyuan ;   et al. | 2018-10-25 |
Cobalt interconnects formed by selective bottom-up fill Grant 10,109,490 - Lin , et al. October 23, 2 | 2018-10-23 |
Etch profile control during skip via formation Grant 10,109,526 - Zhang , et al. October 23, 2 | 2018-10-23 |
Pre-spacer Self-aligned Cut Formation App 20180301413 - Zhang; Xunyuan ;   et al. | 2018-10-18 |
Methods Of Forming Conductive Structures App 20180277426 - Xie; Ruilong ;   et al. | 2018-09-27 |
Metal Interconnects For Super (skip) Via Integration App 20180269150 - LIN; Sean Xuan ;   et al. | 2018-09-20 |
Low Resistance Ruthenium-containing Contacts App 20180269297 - ZHANG; Xunyuan ;   et al. | 2018-09-20 |
IC structure with interface liner and methods of forming same Grant 10,079,208 - Zhang , et al. September 18, 2 | 2018-09-18 |
Non-mandrel Cut Formation App 20180261457 - Law; Shao Beng ;   et al. | 2018-09-13 |
Post spacer self-aligned cuts Grant 10,056,291 - Law , et al. August 21, 2 | 2018-08-21 |
Self-aligned lithographic patterning Grant 10,056,292 - Law , et al. August 21, 2 | 2018-08-21 |
Metal interconnects for super (skip) via integration Grant 10,026,687 - Lin , et al. July 17, 2 | 2018-07-17 |
Method and apparatus for placing a gate contact inside a semiconductor active region having high-k dielectric gate caps Grant 10,014,215 - Labonte , et al. July 3, 2 | 2018-07-03 |
Methods of forming integrated circuit structure using extreme ultraviolet photolithography technique and related integrated circuit structure Grant 10,014,297 - Sun , et al. July 3, 2 | 2018-07-03 |
Self Aligned Interconnect Structures App 20180151504 - ZHANG; Xunyuan ;   et al. | 2018-05-31 |
Inverted damascene interconnect structures Grant 9,984,919 - Zhang , et al. May 29, 2 | 2018-05-29 |
Post Spacer Self-aligned Cuts App 20180144976 - LAW; Shao Beng ;   et al. | 2018-05-24 |
Self-aligned Lithographic Patterning App 20180144979 - Law; Shao Beng ;   et al. | 2018-05-24 |
Skip Via Structures App 20180130699 - Zhang; Xunyuan ;   et al. | 2018-05-10 |
Method To Form Air-gap Spacers And Air-gap Spacer-containing Structures App 20180130899 - ZHANG; Xunyuan ;   et al. | 2018-05-10 |
Pre-spacer self-aligned cut formation Grant 9,966,338 - Zhang , et al. May 8, 2 | 2018-05-08 |
Method of making self-aligned continuity cuts in mandrel and non-mandrel metal lines Grant 9,953,834 - Sun , et al. April 24, 2 | 2018-04-24 |
Method and apparatus for placing a gate contact inside an active region of a semiconductor Grant 9,941,278 - Labonte , et al. April 10, 2 | 2018-04-10 |
Self aligned interconnect structures Grant 9,922,929 - Zhang , et al. March 20, 2 | 2018-03-20 |
Sidewall spacer pattern formation method Grant 9,911,604 - Sun , et al. March 6, 2 | 2018-03-06 |
Devices And Methods Of Forming Low Resistivity Noble Metal Interconnect App 20180040555 - ZHANG; Xunyuan ;   et al. | 2018-02-08 |
Ic Structure With Interface Liner And Methods Of Forming Same App 20180033728 - Zhang; Xunyuan ;   et al. | 2018-02-01 |
Method And Apparatus For Placing A Gate Contact Inside A Semiconductor Active Region Having High-k Dielectric Gate Caps App 20180012798 - LABONTE; Andre ;   et al. | 2018-01-11 |
Method And Apparatus For Placing A Gate Contact Inside An Active Region Of A Semiconductor App 20180012887 - LABONTE; Andre ;   et al. | 2018-01-11 |
Method of making self-aligned continuity cuts in mandrel and non-mandrel metal lines Grant 9,859,120 - Sun , et al. January 2, 2 | 2018-01-02 |
Middle of the line (MOL) metal contacts Grant 9,859,217 - Niu , et al. January 2, 2 | 2018-01-02 |
Interconnects Having Hybrid Metallization App 20170373000 - Zhang; Xunyuan ;   et al. | 2017-12-28 |
Method of forming a gate contact structure for a semiconductor device Grant 9,853,110 - Zhang , et al. December 26, 2 | 2017-12-26 |
Raised fin structures and methods of fabrication Grant 9,837,268 - Qi , et al. December 5, 2 | 2017-12-05 |
Devices And Methods Of Forming Low Resistivity Noble Metal Interconnect App 20170345752 - ZHANG; Xunyuan ;   et al. | 2017-11-30 |
Devices And Methods Of Forming Low Resistivity Noble Metal Interconnect With Improved Adhesion App 20170345766 - ZHANG; Xunyuan ;   et al. | 2017-11-30 |
Devices and methods of forming low resistivity noble metal interconnect Grant 9,831,174 - Zhang , et al. November 28, 2 | 2017-11-28 |
Interconnect structures Grant 9,831,124 - Zhang , et al. November 28, 2 | 2017-11-28 |
Methods that use at least a dual damascene process and, optionally, a single damascene process to form interconnects with hybrid metallization and the resulting structures Grant 9,824,970 - Zhang , et al. November 21, 2 | 2017-11-21 |
Method and apparatus for placing a gate contact inside a semiconductor active region having high-k dielectric gate caps Grant 9,824,921 - Labonte , et al. November 21, 2 | 2017-11-21 |
Skip via structures Grant 9,805,972 - Zhang , et al. October 31, 2 | 2017-10-31 |
Cobalt interconnects covered by a metal cap Grant 9,799,555 - Zhang , et al. October 24, 2 | 2017-10-24 |
Methods employing sacrificial barrier layer for protection of vias during trench formation Grant 9,799,559 - Siddiqui , et al. October 24, 2 | 2017-10-24 |
Methods Of Forming Conductive Structures With Different Material Compositions In A Metallization Layer App 20170256449 - Zhang; Xunyuan ;   et al. | 2017-09-07 |
Middle of the line (MOL) metal contacts Grant 9,721,889 - Niu , et al. August 1, 2 | 2017-08-01 |
Amorphous Metal Interconnections By Subtractive Etch App 20170154816 - LIN; Sean X. ;   et al. | 2017-06-01 |
Topological method to build self-aligned MTJ without a mask Grant 9,666,791 - Zhang , et al. May 30, 2 | 2017-05-30 |
Method Of Forming A Gate Contact Structure For A Semiconductor Device App 20170125530 - Zhang; Xunyuan ;   et al. | 2017-05-04 |
Integrated circuits including modified liners and methods for fabricating the same Grant 9,613,906 - Ryan , et al. April 4, 2 | 2017-04-04 |
Methods of forming ruthenium conductive structures in a metallization layer Grant 9,589,836 - Zhang , et al. March 7, 2 | 2017-03-07 |
Formation of IC structure with pair of unitary metal fins Grant 9,570,394 - Zhang , et al. February 14, 2 | 2017-02-14 |
Methods of forming an improved via to contact interface by selective formation of a conductive capping layer Grant 9,559,059 - Zhang , et al. January 31, 2 | 2017-01-31 |
Methods for fabricating integrated circuits including back-end-of-the-line interconnect structures Grant 9,553,017 - Zhang January 24, 2 | 2017-01-24 |
Methods, apparatus and system for forming a dielectric field for dual orientation self aligned vias Grant 9,530,691 - Zhang , et al. December 27, 2 | 2016-12-27 |
Methods Of Forming V0 Structures For Semiconductor Devices By Forming A Protection Layer With A Non-uniform Thickness App 20160358908 - Xie; Ruilong ;   et al. | 2016-12-08 |
Methods of forming an improved via to contact interface by selective formation of a metal silicide capping layer Grant 9,466,530 - Zhang , et al. October 11, 2 | 2016-10-11 |
Raised Fin Structures And Methods Of Fabrication App 20160260605 - QI; Yi ;   et al. | 2016-09-08 |
Methods of forming gate structures for semiconductor devices using a replacement gate technique and the resulting devices Grant 9,437,711 - Cai , et al. September 6, 2 | 2016-09-06 |
Semiconductor device with low-K spacers Grant 9,425,280 - Cai , et al. August 23, 2 | 2016-08-23 |
Methods of forming V0 structures for semiconductor devices that includes recessing a contact structure Grant 9,412,660 - Xie , et al. August 9, 2 | 2016-08-09 |
Methods For Fabricating Integrated Circuits Including Back-end-of-the-line Interconnect Structures App 20160218034 - Zhang; Xunyuan | 2016-07-28 |
Raised fin structures and methods of fabrication Grant 9,391,140 - Qi , et al. July 12, 2 | 2016-07-12 |
Integrated circuits and methods for fabricating integrated circuits with improved contact structures Grant 9,373,542 - Zhang , et al. June 21, 2 | 2016-06-21 |
Topological Method To Build Self-aligned Mtj Without A Mask App 20160141489 - ZHANG; Xunyuan ;   et al. | 2016-05-19 |
Device having self-repair Cu barrier for solving barrier degradation due to Ru CMP Grant 9,343,406 - Zhang , et al. May 17, 2 | 2016-05-17 |
Methods Of Forming A Protective Layer On An Insulating Layer For Protection During Formation Of Conductive Structures App 20160133572 - Zhang; Xunyuan ;   et al. | 2016-05-12 |
Methods Of Forming An Improved Via To Contact Interface By Selective Formation Of A Conductive Capping Layer App 20160126190 - Zhang; Xunyuan ;   et al. | 2016-05-05 |
Methods Of Forming An Improved Via To Contact Interface By Selective Formation Of A Metal Silicide Capping Layer App 20160126135 - Zhang; Xunyuan ;   et al. | 2016-05-05 |
Copper based nitride liner passivation layers for conductive copper structures Grant 9,318,436 - Zhang , et al. April 19, 2 | 2016-04-19 |
Integrated circuits having magnetic tunnel junctions (MTJ) and methods for fabricating the same Grant 9,299,745 - Zhang , et al. March 29, 2 | 2016-03-29 |
Combinatorial screening of metallic diffusion barriers Grant 9,297,775 - Adhiprakasha , et al. March 29, 2 | 2016-03-29 |
Integrated circuits with improved contact structures Grant 9,287,213 - Zhang , et al. March 15, 2 | 2016-03-15 |
Methods for fabricating integrated circuits using chemical mechanical planarization to recess metal Grant 9,275,874 - Tanwar , et al. March 1, 2 | 2016-03-01 |
Multi-layer barrier layer for interconnect structure Grant 9,269,615 - Ryan , et al. February 23, 2 | 2016-02-23 |
Methods Of Forming Mis Contact Structures For Semiconductor Devices By Selective Deposition Of Insulating Material And The Resulting Devices App 20160049370 - Kamineni; Vimal ;   et al. | 2016-02-18 |
Minimizing void formation in semiconductor vias and trenches Grant 9,263,327 - Zhang , et al. February 16, 2 | 2016-02-16 |
Methods of forming a metal cap layer on copper-based conductive structures on an integrated circuit device Grant 9,236,299 - Zhang , et al. January 12, 2 | 2016-01-12 |
Magnetic tunnel junction between metal layers of a semiconductor device Grant 9,236,557 - Zhang , et al. January 12, 2 | 2016-01-12 |
Structure And Method Of Forming Silicide On Fins App 20150380510 - Zhang; Xunyuan ;   et al. | 2015-12-31 |
Raised Fin Structures And Methods Of Fabrication App 20150372084 - QI; Yi ;   et al. | 2015-12-24 |
Integrated Circuits Including Modified Liners And Methods For Fabricating The Same App 20150371898 - RYAN; ERROL TODD ;   et al. | 2015-12-24 |
Minimizing Void Formation In Semiconductor Vias And Trenches App 20150371899 - ZHANG; Xunyuan ;   et al. | 2015-12-24 |
Method for reducing wettability of interconnect material at corner interface and device incorporating same Grant 9,209,135 - Zhang , et al. December 8, 2 | 2015-12-08 |
Combinatorial screening of metallic diffusion barriers App 20150338362 - Adhiprakasha; Edwin ;   et al. | 2015-11-26 |
Topological method to build self-aligned MTJ without a mask Grant 9,190,260 - Zhang , et al. November 17, 2 | 2015-11-17 |
Semiconductor devices with copper interconnects and methods for fabricating same Grant 9,190,323 - Zhang , et al. November 17, 2 | 2015-11-17 |
Integrated circuits and methods for fabricating integrated circuits with reduced parasitic capacitance Grant 9,190,486 - Xie , et al. November 17, 2 | 2015-11-17 |
Methods For Fabricating Integrated Circuits Including Barrier Layers For Interconnect Structures App 20150325467 - Zhang; Xunyuan ;   et al. | 2015-11-12 |
Integrated Circuits Having Magnetic Tunnel Junctions (mtj) And Methods For Fabricating The Same App 20150325622 - Zhang; Xunyuan ;   et al. | 2015-11-12 |
Methods for fabricating integrated circuits including barrier layers for interconnect structures Grant 9,177,858 - Zhang , et al. November 3, 2 | 2015-11-03 |
Hybrid manganese and manganese nitride barriers for back-end-of-line metallization and methods for fabricating the same Grant 9,159,610 - Zhang , et al. October 13, 2 | 2015-10-13 |
Structure and method of forming silicide on fins Grant 9,159,617 - Zhang , et al. October 13, 2 | 2015-10-13 |
Semiconductor Device With Low-k Spacers App 20150255561 - Cai; Xiuyu ;   et al. | 2015-09-10 |
Methods Of Forming A Metal Cap Layer On Copper-based Conductive Structures On An Integrated Circuit Device App 20150255339 - Zhang; Xunyuan ;   et al. | 2015-09-10 |
Integrated Circuits With A Copper And Manganese Component And Methods For Producing Such Integrated Circuits App 20150255331 - Zhang; Xunyuan ;   et al. | 2015-09-10 |
Integrated Circuits With Improved Contact Structures App 20150235957 - Zhang; Xunyuan ;   et al. | 2015-08-20 |
Structure And Method Of Forming Silicide On Fins App 20150214105 - Zhang; Xunyuan ;   et al. | 2015-07-30 |
Achieving greater planarity between upper surfaces of a layer and a conductive structure residing therein Grant 9,093,401 - Zhang , et al. July 28, 2 | 2015-07-28 |
Electroless fill of trench in semiconductor structure Grant 9,087,881 - Lin , et al. July 21, 2 | 2015-07-21 |
Magnetic Tunnel Junction Between Metal Layers Of A Semiconductor Device App 20150200353 - Zhang; Xunyuan ;   et al. | 2015-07-16 |
Multi-layer barrier layer stacks for interconnect structures Grant 9,076,792 - Ryan , et al. July 7, 2 | 2015-07-07 |
Method and device for self-aligned contact on a non-recessed metal gate Grant 9,076,816 - Zhang , et al. July 7, 2 | 2015-07-07 |
Methods for fabricating integrated circuits using surface modification to selectively inhibit etching Grant 9,076,846 - Ryan , et al. July 7, 2 | 2015-07-07 |
Methods of forming a semiconductor device with low-k spacers and the resulting device Grant 9,064,948 - Cai , et al. June 23, 2 | 2015-06-23 |
Selective Growth of a Work-Function Metal in a Replacement Metal Gate of a Semiconductor Device App 20150171086 - Cai; Xiuyu ;   et al. | 2015-06-18 |
Methods of forming non-continuous conductive layers for conductive structures on an integrated circuit product Grant 9,059,255 - Ryan , et al. June 16, 2 | 2015-06-16 |
Methods for integration of pore stuffing material Grant 9,054,052 - Licausi , et al. June 9, 2 | 2015-06-09 |
Methods for fabricating integrated circuits with improved contact structures Grant 9,040,421 - Zhang , et al. May 26, 2 | 2015-05-26 |
Method And Device For Self-aligned Contact On A Non-recessed Metal Gate App 20150137273 - ZHANG; Xunyuan ;   et al. | 2015-05-21 |
Methods Of Forming Gate Structures For Semiconductor Devices Using A Replacement Gate Technique And The Resulting Devices App 20150137271 - Cai; Xiuyu ;   et al. | 2015-05-21 |
Integrated Circuits And Methods For Fabricating Integrated Circuits With Improved Contact Structures App 20150137373 - Zhang; Xunyuan ;   et al. | 2015-05-21 |
Method To Use Self-repair Cu Barrier To Solve Barrier Degradation Due To Ru Cmp App 20150130063 - ZHANG; Xunyuan ;   et al. | 2015-05-14 |
Methods For Fabricating Integrated Circuits Using Surface Modification To Selectively Inhibit Etching App 20150126028 - Ryan; Errol Todd ;   et al. | 2015-05-07 |
Selective growth of a work-function metal in a replacement metal gate of a semiconductor device Grant 9,018,711 - Cai , et al. April 28, 2 | 2015-04-28 |
Selective Growth Of A Work-function Metal In A Replacement Metal Gate Of A Semiconductor Device App 20150108577 - Cai; Xiuyu ;   et al. | 2015-04-23 |
Hybrid Manganese And Manganese Nitride Barriers For Back-end-of-line Metallization And Methods For Fabricating The Same App 20150108647 - Zhang; Xunyuan ;   et al. | 2015-04-23 |
Barrier layer conformality in copper interconnects Grant 8,980,740 - Ryan , et al. March 17, 2 | 2015-03-17 |
Methods For Fabricating Integrated Circuits Using Chemical Mechanical Planarization To Recess Metal App 20150064903 - Tanwar; Kunaljeet ;   et al. | 2015-03-05 |
Method to use self-repair Cu barrier to solve barrier degradation due to Ru CMP Grant 8,962,478 - Zhang , et al. February 24, 2 | 2015-02-24 |
Methods of self-forming barrier integration with pore stuffed ULK material Grant 8,932,934 - Chae , et al. January 13, 2 | 2015-01-13 |
Achieving Greater Planarity Between Upper Surfaces Of A Layer And A Conductive Structure Residing Therein App 20140370705 - ZHANG; Xunyuan ;   et al. | 2014-12-18 |
Methods Of Forming Copper-based Nitride Liner/passivation Layers For Conductive Copper Structures And The Resulting Device App 20140361435 - Zhang; Xunyuan ;   et al. | 2014-12-11 |
Semiconductor device having a self-forming barrier layer at via bottom Grant 8,907,483 - Zhao , et al. December 9, 2 | 2014-12-09 |
Methods Of Self-forming Barrier Integration With Pore Stuffed Ulk Material App 20140353835 - CHAE; Moosung M. ;   et al. | 2014-12-04 |
Methods For Integration Of Pore Stuffing Material App 20140353802 - LICAUSI; Nicholas Vincent ;   et al. | 2014-12-04 |
Methods Of Forming Conductive Structures Using A Sacrificial Material During An Etching Process That Is Performed To Remove A Metal Hard Mask App 20140357078 - Zhang; Xunyuan ;   et al. | 2014-12-04 |
Methods Of Forming Conductive Structures Using A Sacrificial Material During A Metal Hard Mask Removal Process App 20140357079 - Tanwar; Kunaljeet ;   et al. | 2014-12-04 |
Methods Of Semiconductor Contaminant Removal Using Supercritical Fluid App 20140353805 - RYAN; Errol Todd ;   et al. | 2014-12-04 |
Methods of forming conductive structures using a sacrificial liner layer Grant 8,889,549 - Zhang , et al. November 18, 2 | 2014-11-18 |
Achieving greater planarity between upper surfaces of a layer and a conductive structure residing therein Grant 8,883,020 - Zhang , et al. November 11, 2 | 2014-11-11 |
Methods of forming conductive structures using a sacrificial material during a metal hard mask removal process Grant 8,883,631 - Tanwar , et al. November 11, 2 | 2014-11-11 |
Integrated Circuits And Methods For Fabricating Integrated Circuits With Improved Contact Structures App 20140327140 - Zhang; Xunyuan ;   et al. | 2014-11-06 |
Methods of forming a barrier system containing an alloy of metals introduced into the barrier system, and an integrated circuit product containing such a barrier system Grant 8,877,633 - Zhang , et al. November 4, 2 | 2014-11-04 |
Methods of forming copper-based nitride liner/passivation layers for conductive copper structures and the resulting device Grant 8,859,419 - Zhang , et al. October 14, 2 | 2014-10-14 |
Methods Of Forming A Barrier System Containing An Alloy Of Metals Introduced Into The Barrier System, And An Integrated Circuit Product Containing Such A Barrier System App 20140291847 - Zhang; Xunyuan ;   et al. | 2014-10-02 |
Multi-layer Barrier Layer Stacks For Interconnect Structures App 20140264876 - Ryan; Vivian W. ;   et al. | 2014-09-18 |
Barrier Layer Conformality In Copper Interconnects App 20140252617 - RYAN; Errol Todd ;   et al. | 2014-09-11 |
Electroless Fill Of Trench In Semiconductor Structure App 20140252616 - Lin; Sean X. ;   et al. | 2014-09-11 |
Methods Of Forming Non-continuous Conductive Layers For Conductive Structures On An Integrated Circuit Product App 20140246775 - Ryan; Vivian W. ;   et al. | 2014-09-04 |
Methods Of Forming Conductive Structures Using A Sacrificial Liner Layer App 20140227872 - Zhang; Xunyuan ;   et al. | 2014-08-14 |
Methods Of Forming Copper-based Nitride Liner/passivation Layers For Conductive Copper Structures And The Resulting Device App 20140217588 - Zhang; Xunyuan ;   et al. | 2014-08-07 |
Multi-layer Barrier Layer For Interconnect Structure App 20140217591 - Ryan; Vivian W. ;   et al. | 2014-08-07 |
Achieving Greater Planarity Between Upper Surfaces Of A Layer And A Conductive Structure Residing Therein App 20140209563 - ZHANG; Xunyuan ;   et al. | 2014-07-31 |
Method For Reducing Wettability Of Interconnect Material At Corner Interface And Device Incorporating Same App 20140210088 - Zhang; Xunyuan ;   et al. | 2014-07-31 |
Methods of forming copper-based conductive structures on semiconductor devices Grant 8,791,014 - Zhang , et al. July 29, 2 | 2014-07-29 |
Multi-layer barrier layer stacks for interconnect structures Grant 8,772,158 - Ryan , et al. July 8, 2 | 2014-07-08 |
Methods of forming conductive copper-based structures using a copper-based nitride seed layer without a barrier layer and the resulting device Grant 8,753,975 - Zhang , et al. June 17, 2 | 2014-06-17 |
Methods Of Forming Graphene Liners And/or Cap Layers On Copper-based Conductive Structures App 20140145332 - Ryan; Errol T. ;   et al. | 2014-05-29 |
Integrated Circuits And Methods For Fabricating Integrated Circuits With Reduced Parasitic Capacitance App 20140138779 - Xie; Ruilong ;   et al. | 2014-05-22 |
Multi-layer barrier layer for interconnect structure Grant 8,728,931 - Ryan , et al. May 20, 2 | 2014-05-20 |
Method for reducing wettability of interconnect material at corner interface and device incorporating same Grant 8,722,534 - Zhang , et al. May 13, 2 | 2014-05-13 |
Methods Of Forming A Semiconductor Device With Low-k Spacers And The Resulting Device App 20140110798 - Cai; Xiuyu ;   et al. | 2014-04-24 |
Integrated circuits and methods for processing integrated circuits with embedded features Grant 8,704,372 - Ryan , et al. April 22, 2 | 2014-04-22 |
Semiconductor Device Having A Self-forming Barrier Layer At Via Bottom App 20140097538 - Zhao; Larry ;   et al. | 2014-04-10 |
Methods for forming an integrated circuit with straightened recess profile Grant 8,691,696 - Cai , et al. April 8, 2 | 2014-04-08 |
Methods of forming copper-based conductive structures by forming a copper-based seed layer having an as-deposited thickness profile and thereafter performing an etching process and electroless copper deposition Grant 8,673,766 - Lin , et al. March 18, 2 | 2014-03-18 |
Methods Of Forming A Metal Cap Layer On Copper-based Conductive Structures On An Integrated Circuit Device App 20140057435 - Zhang; Xunyuan ;   et al. | 2014-02-27 |
Method For Reducing Wettability Of Interconnect Material At Corner Interface And Device Incorporating Same App 20140027910 - Zhang; Xunyuan ;   et al. | 2014-01-30 |
Multi-layer Barrier Layer For Interconnect Structure App 20140021613 - Ryan; Vivian W. ;   et al. | 2014-01-23 |
Multi-layer Barrier Layer Stacks For Interconnect Structures App 20140021615 - Ryan; Vivian W. ;   et al. | 2014-01-23 |
Multi-layer Barrier Layer For Interconnect Structure App 20140024212 - Ryan; Vivian W. ;   et al. | 2014-01-23 |
Subtractive metal multi-layer barrier layer for interconnect structure Grant 8,623,758 - Ryan , et al. January 7, 2 | 2014-01-07 |
Stress Gauge Comprised Of A Piezoelectric Material For Use With Integrated Circuit Products App 20130334532 - Zhang; Xunyuan ;   et al. | 2013-12-19 |
Methods of selectively forming ruthenium liner layer Grant 8,609,531 - Zhang December 17, 2 | 2013-12-17 |
Methods For Forming An Integrated Circuit With Straightened Recess Profile App 20130309868 - Cai; Xiuyu ;   et al. | 2013-11-21 |
Methods Of Forming Copper-based Conductive Structures By Forming A Copper-based Seed Layer Having An As-deposited Thickness Profile And Thereafter Performing An Etching Process And Electroless Copper Deposition App 20130309863 - Lin; Sean X. ;   et al. | 2013-11-21 |
Methods for fabricating integrated circuits with ruthenium-lined copper Grant 8,586,473 - Tanwar , et al. November 19, 2 | 2013-11-19 |
Integrated Circuits And Methods For Processing Integrated Circuits With Embedded Features App 20130241062 - Ryan; Errol T. ;   et al. | 2013-09-19 |
Methods Of Forming Copper-based Conductive Structures On Semiconductor Devices App 20130244422 - Zhang; Xunyuan ;   et al. | 2013-09-19 |
Methods Of Forming Copper-based Conductive Structures On An Integrated Circuit Device App 20130244421 - LIN; Sean X. ;   et al. | 2013-09-19 |
Methods of forming copper-based conductive structures on an integrated circuit device Grant 8,517,769 - Lin , et al. August 27, 2 | 2013-08-27 |
Semiconductor Devices With Copper Interconnects And Methods For Fabricating Same App 20130187273 - Zhang; Xunyuan ;   et al. | 2013-07-25 |
Integrated circuits and methods for processing integrated circuits with embedded features Grant 8,431,482 - Ryan , et al. April 30, 2 | 2013-04-30 |