loadpatents
name:-0.097504854202271
name:-0.068887948989868
name:-0.023622989654541
Zhai; Jun Patent Filings

Zhai; Jun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Zhai; Jun.The latest application filed is for "high density 3d interconnect configuration".

Company Profile
24.72.98
  • Zhai; Jun - Cupertino CA
  • Zhai; Jun - San Jose CA
  • Zhai; Jun - Suzhou CN
  • Zhai; Jun - Chicago IL
  • Zhai; Jun - Campbell CA
  • Zhai; Jun - Mountain View CA US
  • Zhai; Jun - San Mateo CA
  • Zhai; Jun - Sunnyvale CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
High Density 3D Interconnect Configuration
App 20220285273 - Dabral; Sanjay ;   et al.
2022-09-08
Scalable extreme large size substrate integration
Grant 11,404,337 - Hu , et al. August 2, 2
2022-08-02
Wafer level integration of passive devices
Grant 11,398,456 - Zhai July 26, 2
2022-07-26
Die Stitching And Harvesting Of Arrayed Structures
App 20220199517 - Dabral; Sanjay ;   et al.
2022-06-23
Fully Interconnected Heterogeneous Multi-layer Reconstructed Silicon Device
App 20220157782 - Zhai; Jun
2022-05-19
Flexible Package Architecture Concept in Fanout
App 20220157680 - Shanmugam; Karthik ;   et al.
2022-05-19
Modular vertical water storage greening system
Grant 11,317,573 - Zhai May 3, 2
2022-05-03
High density 3D interconnect configuration
Grant 11,309,246 - Dabral , et al. April 19, 2
2022-04-19
Multiple Component Integration In Fanout Package With Different Back Side Metallization And Thicknesses
App 20220093523 - Shanmugam; Karthik ;   et al.
2022-03-24
Package Integration Using Fanout Cavity Substrate
App 20220093522 - Shanmugam; Karthik ;   et al.
2022-03-24
Guarantee Fund Calculation With Allocation For Self-referencing Risk
App 20220036462 - Baysal; Evren ;   et al.
2022-02-03
Power Management System Switched Capacitor Voltage Regulator With Integrated Passive Device
App 20220014095 - Dabral; Sanjay ;   et al.
2022-01-13
Wafer Reconstitution And Die-stitching
App 20220013504 - Dabral; Sanjay ;   et al.
2022-01-13
Fully interconnected heterogeneous multi-layer reconstructed silicon device
Grant 11,217,563 - Zhai January 4, 2
2022-01-04
Multi-Die Fine Grain Integrated Voltage Regulation
App 20210398980 - Zerbe; Jared L. ;   et al.
2021-12-23
Hybrid Thermal Interface Material and Low Temperature Solder Patterns to Improve Package Warpage and Reliability
App 20210366861 - Chen; Wei ;   et al.
2021-11-25
Guarantee fund calculation with allocation for self-referencing risk
Grant 11,182,857 - Baysal , et al. November 23, 2
2021-11-23
Wafer reconstitution and die-stitching
Grant 11,158,607 - Dabral , et al. October 26, 2
2021-10-26
Double side mounted large MCM package with memory channel length reduction
Grant 11,158,621 - Zhong , et al. October 26, 2
2021-10-26
Multiple Chip Module Trenched Lid and Low Coefficient of Thermal Expansion Stiffener Ring
App 20210305227 - Chen; Wei ;   et al.
2021-09-30
Power management system switched capacitor voltage regulator with integrated passive device
Grant 11,101,732 - Dabral , et al. August 24, 2
2021-08-24
High Density 3d Interconnect Configuration
App 20210242170 - Dabral; Sanjay ;   et al.
2021-08-05
Trimmable banked capacitor
Grant 11,069,665 - Ramachandran , et al. July 20, 2
2021-07-20
Systems And Methods For Interconnecting Dies
App 20210217702 - Dabral; Sanjay ;   et al.
2021-07-15
Multi-die fine grain integrated voltage regulation
Grant 11,063,046 - Zerbe , et al. July 13, 2
2021-07-13
3D fanout stacking
Grant 11,056,373 - Zhai , et al. July 6, 2
2021-07-06
Scalable Extreme Large Size Substrate Integration
App 20210202332 - Hu; Kunzhong ;   et al.
2021-07-01
High Density Interconnection Using Fanout Interposer Chiplet
App 20210159180 - Zhai; Jun ;   et al.
2021-05-27
Fully Interconnected Heterogeneous Multi-layer Reconstructed Silicon Device
App 20210125967 - Zhai; Jun
2021-04-29
Systems and methods for forming die sets with die-to-die routing and metallic seals
Grant 10,985,107 - Dabral , et al. April 20, 2
2021-04-20
High density interconnection using fanout interposer chiplet
Grant 10,943,869 - Zhai , et al. March 9, 2
2021-03-09
Structure and Method for Fabricating a Computing System with an Integrated Voltage Regulator Module
App 20210043511 - Ramachandran; Vidhya ;   et al.
2021-02-11
High Bandwidth Die To Die Interconnect With Package Area Reduction
App 20210020610 - Zhong; Chonghua ;   et al.
2021-01-21
Semiconductor Packaging Substrate Fine Pitch Metal Bump and Reinforcement Structures
App 20200381383 - Hsu; Jun Chung ;   et al.
2020-12-03
Modular Vertical Water Storage Greening System
App 20200367453 - ZHAI; Jun
2020-11-26
Power Management System Switched Capacitor Voltage Regulator With Integrated Passive Device
App 20200358351 - Dabral; Sanjay ;   et al.
2020-11-12
Structure and method for fabricating a computing system with an integrated voltage regulator module
Grant 10,818,632 - Ramachandran , et al. October 27, 2
2020-10-27
High bandwidth die to die interconnect with package area reduction
Grant 10,770,433 - Zhong , et al. Sep
2020-09-08
Double Side Mounted Large Mcm Package With Memory Channel Length Reduction
App 20200279842 - Zhong; Chonghua ;   et al.
2020-09-03
High Bandwidth Die To Die Interconnect With Package Area Reduction
App 20200273843 - Zhong; Chonghua ;   et al.
2020-08-27
Power management system switched capacitor voltage regulator with integrated passive device
Grant 10,756,622 - Dabral , et al. A
2020-08-25
Power Management System Switched Capacitor Voltage Regulator With Integrated Passive Device
App 20200204067 - Dabral; Sanjay ;   et al.
2020-06-25
Double side mounted large MCM package with memory channel length reduction
Grant 10,685,948 - Zhong , et al.
2020-06-16
Wafer Reconstitution And Die-stitching
App 20200176419 - Dabral; Sanjay ;   et al.
2020-06-04
Double Side Mounted Large Mcm Package With Memory Channel Length Reduction
App 20200176431 - Zhong; Chonghua ;   et al.
2020-06-04
Trimmable Banked Capacitor
App 20200176427 - Ramachandran; Vidhya ;   et al.
2020-06-04
Stacked printed circuit board packages
Grant 10,631,410 - Provencher , et al.
2020-04-21
Systems And Methods For Interconnecting Dies
App 20200075497 - Dabral; Sanjay ;   et al.
2020-03-05
Guarantee Fund Calculation With Allocation For Self-referencing Risk
App 20200074557 - Baysal; Evren ;   et al.
2020-03-05
Margin Requirement Determination And Modeling For Cleared Credit
App 20200043093 - Baysal; Evren ;   et al.
2020-02-06
Multi-Die Fine Grain Integrated Voltage Regulation
App 20200027881 - Zerbe; Jared L. ;   et al.
2020-01-23
Wafer Level Integration Of Passive Devices
App 20200027861 - Zhai; Jun
2020-01-23
Guarantee fund calculation with allocation for self-referencing risk
Grant 10,504,186 - Baysal , et al. Dec
2019-12-10
Wafer level integration of passive devices
Grant 10,468,381 - Zhai No
2019-11-05
Margin requirement determination and modeling for cleared credit
Grant 10,430,880 - Baysal , et al. O
2019-10-01
Multi-die fine grain integrated voltage regulation
Grant 10,411,012 - Zerbe , et al. Sept
2019-09-10
Package with SoC and integrated memory
Grant 10,290,620 - Bruno , et al.
2019-05-14
3D thin profile pre-stacking architecture using reconstitution method
Grant 10,181,455 - Zhai , et al. Ja
2019-01-15
Multi-Die Fine Grain Integrated Voltage Regulation
App 20180366466 - Zerbe; Jared L. ;   et al.
2018-12-20
High Density Interconnection Using Fanout Interposer Chiplet
App 20180358298 - Zhai; Jun ;   et al.
2018-12-13
Dual-sided silicon integrated passive devices
Grant 10,103,138 - Zhai , et al. October 16, 2
2018-10-16
SOC with integrated voltage regulator using preformed MIM capacitor wafer
Grant 10,056,327 - Zhai , et al. August 21, 2
2018-08-21
Multi-die fine grain integrated voltage regulation
Grant 10,056,384 - Zerbe , et al. August 21, 2
2018-08-21
Various stress free sensor packages using wafer level supporting die and air gap technique
Grant 10,041,847 - Han , et al. August 7, 2
2018-08-07
3d Thin Profile Pre-stacking Architecture Using Reconstitution Method
App 20180204820 - Zhai; Jun ;   et al.
2018-07-19
Structure and method for fabricating a computing system with an integrated voltage regulator module
Grant 9,935,076 - Ramachandran , et al. April 3, 2
2018-04-03
Three layer stack structure
Grant 9,935,087 - Zhai , et al. April 3, 2
2018-04-03
Stacked Printed Circuit Board Packages
App 20180092213 - Provencher; Corey S. ;   et al.
2018-03-29
Biometric sensor chip having distributed sensor and control circuitry
Grant 9,883,822 - Bhagavat , et al. February 6, 2
2018-02-06
Stacked wafer DDR package
Grant 9,847,284 - Zhai December 19, 2
2017-12-19
Dual-sided Silicon Integrated Passive Devices
App 20170323883 - Zhai; Jun ;   et al.
2017-11-09
Soc With Integrated Voltage Regulator Using Preformed Mim Capacitor Wafer
App 20170256489 - Zhai; Jun ;   et al.
2017-09-07
Dual-sided silicon integrated passive devices
Grant 9,748,227 - Zhai , et al. August 29, 2
2017-08-29
System with a high power chip and a low power chip having low interconnect parasitics
Grant 9,728,481 - Yee , et al. August 8, 2
2017-08-08
SOC with integrated voltage regulator using preformed MIM capacitor wafer
Grant 9,691,701 - Zhai , et al. June 27, 2
2017-06-27
Finger biometric sensor assembly including direct bonding interface and related methods
Grant 9,679,187 - Bhagavat , et al. June 13, 2
2017-06-13
Dual molded stack TSV package
Grant 9,679,801 - Lai , et al. June 13, 2
2017-06-13
Integrated Mems Microphone And Vibration Sensor
App 20170156002 - Han; Caleb C. ;   et al.
2017-06-01
Double side mounting memory integration in thin low warpage fanout package
Grant 9,659,907 - Zhai , et al. May 23, 2
2017-05-23
Package with SoC and Integrated Memory
App 20170141095 - Bruno; John ;   et al.
2017-05-18
Three Layer Stack Structure
App 20170141088 - Zhai; Jun ;   et al.
2017-05-18
Multi-Die Fine Grain Integrated Voltage Regulation
App 20170141116 - Zerbe; Jared L. ;   et al.
2017-05-18
System in package fan out stacking architecture and process flow
Grant 9,633,974 - Zhai , et al. April 25, 2
2017-04-25
Method and apparatus of making MEMS packages
Grant 9,624,093 - Jiang , et al. April 18, 2
2017-04-18
Various Stress Free Sensor Packages Using Wafer Level Supporting Die And Air Gap Technique
App 20170089783 - Han; Caleb C. ;   et al.
2017-03-30
Three layer stack structure
Grant 9,601,471 - Zhai , et al. March 21, 2
2017-03-21
Margin Requirements for Multi-Currency CDS Portfolios
App 20170076375 - Baysal; Evren ;   et al.
2017-03-16
Package with SoC and integrated memory
Grant 9,595,514 - Bruno , et al. March 14, 2
2017-03-14
Multi-die fine grain integrated voltage regulation
Grant 9,595,526 - Zerbe , et al. March 14, 2
2017-03-14
3D integration of fanout wafer level packages
Grant 9,589,936 - Zhai , et al. March 7, 2
2017-03-07
Guarantee Fund Calculation with Allocation for Self-Referencing Risk
App 20170061541 - Baysal; Evren ;   et al.
2017-03-02
Fan out system in package and method for forming the same
Grant 9,583,472 - Chung , et al. February 28, 2
2017-02-28
Independent 3d Stacking
App 20170053897 - Lai; Kwan-Yu ;   et al.
2017-02-23
Various stress free sensor packages using wafer level supporting die and air gap technique
Grant 9,574,959 - Han , et al. February 21, 2
2017-02-21
Ultra fine pitch PoP coreless package
Grant 9,570,367 - Hsu , et al. February 14, 2
2017-02-14
Independent 3D stacking
Grant 9,559,081 - Lai , et al. January 31, 2
2017-01-31
3d Fanout Stacking
App 20170025380 - Zhai; Jun ;   et al.
2017-01-26
Dual-sided Silicon Integrated Passive Devices
App 20170018546 - Zhai; Jun ;   et al.
2017-01-19
Soc With Integrated Voltage Regulator Using Preformed Mim Capacitor Wafer
App 20170018497 - Zhai; Jun ;   et al.
2017-01-19
Integrated circuit die decoupling system with reduced inductance
Grant 9,548,288 - Ramachandran , et al. January 17, 2
2017-01-17
Finger Biometric Sensor Assembly Including Direct Bonding Interface And Related Methods
App 20160371529 - Bhagavat; Milind S. ;   et al.
2016-12-22
Dual Molded Stack Tsv Package
App 20160358889 - Lai; Kwan-Yu ;   et al.
2016-12-08
Three Layer Stack Structure
App 20160315071 - Zhai; Jun ;   et al.
2016-10-27
Package-on-package Options With Multiple Layer 3-d Stacking
App 20160300823 - Zhai; Jun ;   et al.
2016-10-13
Double Side Mounting Memory Integration In Thin Low Warpage Fanout Package
App 20160300813 - Zhai; Jun ;   et al.
2016-10-13
Biometric Sensor Chip Having Distributed Sensor and Control Circuitry
App 20160278671 - Bhagavat; Milind S. ;   et al.
2016-09-29
System and method for calibrating temperatures sensor for integrated circuits
Grant 9,442,025 - Yang , et al. September 13, 2
2016-09-13
System In Package Fan Out Stacking Architecture And Process Flow
App 20160260684 - Zhai; Jun ;   et al.
2016-09-08
Fan Out System In Package And Method For Forming The Same
App 20160260695 - Chung; Chih-Ming ;   et al.
2016-09-08
Biometric Sensor Chip Having Distributed Sensor And Control Circuitry
App 20160217311 - Bhagavat; Milind S. ;   et al.
2016-07-28
Package with SoC and Integrated Memory
App 20160218094 - Bruno; John ;   et al.
2016-07-28
ULTRA FINE PITCH PoP CORELESS PACKAGE
App 20160172261 - Hsu; Jun Chung ;   et al.
2016-06-16
3d Integration Of Fanout Wafer Level Packages
App 20160148904 - ZHAI; Jun ;   et al.
2016-05-26
Method And Apparatus Of Making Mems Packages
App 20160137488 - Jiang; Tongbi ;   et al.
2016-05-19
Package with SoC and integrated memory
Grant 9,331,058 - Bruno , et al. May 3, 2
2016-05-03
Thermally enhanced wafer level fan-out POP package
Grant 9,318,474 - Zhai , et al. April 19, 2
2016-04-19
Ultra fine pitch PoP coreless package
Grant 9,305,853 - Hsu , et al. April 5, 2
2016-04-05
Biometric sensor chip having distributed sensor and control circuitry
Grant 9,305,959 - Bhagavat , et al. April 5, 2
2016-04-05
Wafer Level Integration Of Passive Devices
App 20160093592 - Zhai; Jun
2016-03-31
Various Stress Free Sensor Packages Using Wafer Level Supporting Die And Air Gap Technique
App 20160061677 - Han; Caleb C. ;   et al.
2016-03-03
PoP structure with electrically insulating material between packages
Grant 9,263,426 - Zhao , et al. February 16, 2
2016-02-16
Package-on-package Options With Multiple Layer 3-d Stacking
App 20160013156 - Zhai; Jun ;   et al.
2016-01-14
EMI shielded wafer level fan-out pop package
Grant 9,236,355 - Zhai , et al. January 12, 2
2016-01-12
Package With Memory Die And Logic Die Interconnected In A Face-to-face Configuration
App 20150380392 - Pang; Mengzhi ;   et al.
2015-12-31
Reconfigured Wide I/o Memory Modules And Package Architectures Using Same
App 20150364454 - Zhai; Jun ;   et al.
2015-12-17
Fan Out Wafer Level Package Using Silicon Bridge
App 20150364422 - Zhai; Jun ;   et al.
2015-12-17
Margin Requirement Determination And Modeling For Cleared Credit
App 20150332404 - Baysal; Evren ;   et al.
2015-11-19
Emi Shielded Wafer Level Fan-out Pop Package
App 20150303149 - Zhai; Jun ;   et al.
2015-10-22
Novel Structure Achieving Fine Through Hole Pitch For Integrated Circuit Substrates
App 20150230342 - Hsu; Jun Chung ;   et al.
2015-08-13
Thermally Enhanced Wafer Level Fan-Out POP Package
App 20150171063 - Zhai; Jun ;   et al.
2015-06-18
Package with SoC and Integrated memory
App 20150160701 - Bruno; John ;   et al.
2015-06-11
System and Method for Calibrating Temperatures Sensor for Integrated Circuits
App 20150117486 - Yang; Yizhang ;   et al.
2015-04-30
PoP STRUCTURE WITH ELECTRICALLY INSULATING MATERIAL BETWEEN PACKAGES
App 20150118795 - Zhao; Jie-Hua ;   et al.
2015-04-30
ULTRA FINE PITCH PoP CORELESS PACKAGE
App 20150061142 - Hsu; Jun Chung ;   et al.
2015-03-05
PoP structure with electrically insulating material between packages
Grant 8,963,311 - Zhao , et al. February 24, 2
2015-02-24
Multi-Die Fine Grain Integrated Voltage Regulation
App 20150041955 - Zerbe; Jared L. ;   et al.
2015-02-12
Biometric Sensor Chip Having Distributed Sensor and Control Circuitry
App 20140361395 - Bhagavat; Milind S. ;   et al.
2014-12-11
Stacked Wafer Ddr Package
App 20140210107 - Zhai; Jun
2014-07-31
ULTRA THIN PoP PACKAGE
App 20140210106 - Zhai; Jun
2014-07-31
PoP STRUCTURE WITH ELECTRICALLY INSULATING MATERIAL BETWEEN PACKAGES
App 20140084487 - Zhao; Jie-Hua ;   et al.
2014-03-27
Stackable Flip Chip For Memory Packages
App 20140061950 - Zhai; Jun
2014-03-06
Semiconductor package for controlling warpage
Grant 8,629,541 - Ou , et al. January 14, 2
2014-01-14
Interconnects with improved electromigration reliability
Grant 8,486,767 - Zhai , et al. July 16, 2
2013-07-16
Chip package with channel stiffener frame
Grant 8,405,187 - Tosaya , et al. March 26, 2
2013-03-26
System With A High Power Chip And A Low Power Chip Having Low Interconnect Parasitics
App 20130058067 - YEE; Abraham F. ;   et al.
2013-03-07
Double-sided Flip Chip Package
App 20130020702 - Zhai; Jun ;   et al.
2013-01-24
Expression builder
Grant 8,301,668 - He , et al. October 30, 2
2012-10-30
Semiconductor Package For Controlling Warpage
App 20120056336 - Ou; Min-Shin ;   et al.
2012-03-08
Interconnects With Improved Electromigration Reliability
App 20110250749 - ZHAI; Jun ;   et al.
2011-10-13
Chip Package With Channel Stiffener Frame
App 20110241161 - Tosaya; Eric ;   et al.
2011-10-06
Chip package with channel stiffener frame
Grant 8,008,133 - Tosaya , et al. August 30, 2
2011-08-30
Interconnects with improved electromigration reliability
Grant 7,989,956 - Zhai , et al. August 2, 2
2011-08-02
Semiconductor chip with solder joint protection ring
Grant 7,923,850 - Khan , et al. April 12, 2
2011-04-12
Semiconductor chip with stratified underfill
Grant 7,745,264 - Zhai , et al. June 29, 2
2010-06-29
Semiconductor chip with crack stop
Grant 7,679,200 - Su , et al. March 16, 2
2010-03-16
Semiconductor Chip with Solder Joint Protection Ring
App 20100052188 - Khan; Mohammad ;   et al.
2010-03-04
Chip Package with Channel Stiffener Frame
App 20090200659 - Tosaya; Eric ;   et al.
2009-08-13
Semiconductor Chip with Crack Stop
App 20090065952 - Su; Michael Z. ;   et al.
2009-03-12
Semiconductor Chip with Stratified Underfill
App 20090057928 - Zhai; Jun ;   et al.
2009-03-05
Chip Package with Stiffener Ring
App 20080284047 - Tosaya; Eric ;   et al.
2008-11-20
Method Of Forming Vias In A Semiconductor Device
App 20080182407 - Zhai; Jun ;   et al.
2008-07-31
Method and semiconductor structure for reliability characterization
App 20080102637 - Zhai; Jun ;   et al.
2008-05-01
Integrated circuit package and method
Grant 7,253,504 - Zhai , et al. August 7, 2
2007-08-07

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