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Patent applications and USPTO patent grants for Zaneski; Gerard.The latest application filed is for "method and apparatus for designing a logic circuit using one or more circuit elements having a substantially continuous range of values".
Patent | Date |
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Method and apparatus for designing a logic circuit using one or more circuit elements having a substantially continuous range of values App 20080072205 - Harris; Edward B. ;   et al. | 2008-03-20 |
Multiple purpose reticle layout for selective printing of test circuits Grant 6,893,806 - Bollinger , et al. May 17, 2 | 2005-05-17 |
Integrable DC/AC voltage transformer/isolator and ultra-large-scale circuit incorporating the same Grant 6,876,054 - Shapira , et al. April 5, 2 | 2005-04-05 |
Integrable Dc/ac Voltage Transformer/isolator And Ultra-large-scale Circuit Incorporating The Same App 20050023632 - Shapira, Shye ;   et al. | 2005-02-03 |
Bond pad support structure for a semiconductor device App 20030218259 - Chesire, Daniel Patrick ;   et al. | 2003-11-27 |
Multiple purpose reticle layout for selective printing of test circuits App 20030039928 - Bollinger, Cheryl Anne ;   et al. | 2003-02-27 |
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