loadpatents
name:-0.009019136428833
name:-0.009929895401001
name:-0.0017049312591553
Yu; Jiani Patent Filings

Yu; Jiani

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yu; Jiani.The latest application filed is for "mixed threshold flip-flop element to mitigate hold time penalty due to clock distortion".

Company Profile
1.7.8
  • Yu; Jiani - Fremont CA
  • Yu; Jiani - Sunnyvale CA
  • YU; Jiani - Fujisawa JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Low power flip-flop element with gated clock
Grant 10,931,266 - Elkin , et al. February 23, 2
2021-02-23
Mixed threshold flip-flop element to mitigate hold time penalty due to clock distortion
Grant 10,181,842 - Yang , et al. Ja
2019-01-15
Mitigating external influences on long signal lines
Grant 9,842,631 - Yang , et al. December 12, 2
2017-12-12
Mixed Threshold Flip-flop Element To Mitigate Hold Time Penalty Due To Clock Distortion
App 20170141768 - YANG; Ge ;   et al.
2017-05-18
Low Power Flip-flop Element With Gated Clock
App 20160043706 - ELKIN; Ilyas ;   et al.
2016-02-11
Steam Valve Driving Device And Steam Valve
App 20150345710 - YU; Jiani ;   et al.
2015-12-03
Flip-flop circuit having a reduced hold time requirement for a scan input
Grant 9,110,141 - Lin , et al. August 18, 2
2015-08-18
Low power, single-rail level shifters employing power down signal from output power domain and a method of converting a data signal between power domains
Grant 9,071,240 - Lin , et al. June 30, 2
2015-06-30
Small area low power data retention flop
Grant 8,988,123 - Yang , et al. March 24, 2
2015-03-24
Dual flip-flop circuit
Grant 8,866,528 - Lin , et al. October 21, 2
2014-10-21
Small Area Low Power Data Retention Flop
App 20140167828 - Yang; Ge ;   et al.
2014-06-19
Mitigating External Influences On Long Signal Lines
App 20140169108 - Yang; Ge ;   et al.
2014-06-19
Flip-flop Circuit Having A Reduced Hold Time Requirement For A Scan Input
App 20140129887 - Lin; Hwong-Kwo ;   et al.
2014-05-08
Dual Flip-flop Circuit
App 20140125377 - Lin; Hwong-Kwo ;   et al.
2014-05-08
Low Power, Single-rail Level Shifters Employing Power Down Signal From Output Power Domain And A Method Of Converting A Data Signal Between Power Domains
App 20140084984 - Lin; Hank ;   et al.
2014-03-27

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