Yu; Haiming

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yu; Haiming.The latest application filed is for "memory arbitration circuitry".

Company Profile

0.24.4

Yu; Haiming - Pleasanton CA US
Yu; Haiming - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
First-in-first-out memory with dual memory banks Grant 9,501,407 - Hu , et al. November 22, 2	2016-11-22
Negative bit line driver circuitry Grant 9,256,266 - Yu , et al. February 9, 2	2016-02-09
Memory arbitration circuitry Grant 8,867,303 - Hu , et al. October 21, 2	2014-10-21
Programmable addressing circuitry for increasing memory yield Grant 8,483,006 - Chou , et al. July 9, 2	2013-07-09
Memory Arbitration Circuitry App 20130073763 - Hu; Ray Ruey-Hsien ; et al.	2013-03-21
Dual port PLD embedded memory block to support read-before-write in one clock cycle Grant 8,238,191 - Yu August 7, 2	2012-08-07
Reading and writing data to a memory cell in one clock cycle Grant 7,839,713 - Yu , et al. November 23, 2	2010-11-23
Dual Port PLD Embedded Memory Block to Support Read-Before-Write in One Clock Cycle App 20100157691 - Yu; Haiming	2010-06-24
Using dedicated read output path to reduce unregistered read access time for a FPGA embedded memory Grant 7,715,271 - Yu , et al. May 11, 2	2010-05-11
Dual port random-access-memory circuitry Grant RE41,325 - Yu , et al. May 11, 2	2010-05-11
Write margin calculation tool for dual-port random-access-memory circuitry Grant 7,689,941 - Ooi , et al. March 30, 2	2010-03-30
Dual port PLD embedded memory block to support read-before-write in one clock cycle Grant 7,679,971 - Yu March 16, 2	2010-03-16
Configurable random-access-memory circuitry Grant 7,639,557 - Chou , et al. December 29, 2	2009-12-29
Dual port PLD embedded memory block to support read-before-write in one clock cycle Grant 7,499,365 - Yu March 3, 2	2009-03-03
Dual port random-access-memory circuitry Grant 7,471,588 - Yu , et al. December 30, 2	2008-12-30
Using dedicated read output path to reduce unregistered read access time for FPGA embedded memory Grant 7,414,916 - Yu , et al. August 19, 2	2008-08-19
Dual port random-access-memory circuitry App 20070258313 - Yu; Haiming ; et al.	2007-11-08
Dual-port memory array using shared write drivers and read sense amplifiers Grant 7,289,372 - Yu , et al. October 30, 2	2007-10-30
Divisible true dual port memory system supporting simple dual port memory subsystems Grant 7,269,089 - Yu , et al. September 11, 2	2007-09-11
Method and apparatus for memory block initialization Grant 7,221,185 - Yu , et al. May 22, 2	2007-05-22
Dual port PLD embedded memory block to support read-before-write in one clock cycle Grant 7,206,251 - Yu April 17, 2	2007-04-17
Divisible true dual port memory system supporting simple dual port memory subsystems Grant 7,130,238 - Yu , et al. October 31, 2	2006-10-31
Dual port memory array using shared write drivers and read sense amplifiers Grant 7,110,304 - Yu , et al. September 19, 2	2006-09-19

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