| Patent | Date |
|---|
High-K and metal filled trench-type EDRAM capacitor with electrode depth and dimension control
Grant 9,059,194 - Brodsky , et al. June 16, 2 | 2015-06-16 |
High-k And Metal Filled Trench-type Edram Capacitor With Electrode Depth And Dimension Control
App 20150102463 - Brodsky; Colin J. ; et al. | 2015-04-16 |
High-K and Metal Filled Trench-Type EDRAM Capacitor with Electrode Depth and Dimension Control
App 20140191366 - Brodsky; Colin J. ; et al. | 2014-07-10 |
Method Of Fabricating A Gate Structure
App 20090311855 - Bruff; Richard A. ; et al. | 2009-12-17 |
Advanced Correlation And Process Window Evaluation Application
App 20090119357 - Rice; James P. ; et al. | 2009-05-07 |
Method Of Fabricating A Gate Structure And The Structure Thereof
App 20090101980 - Bruff; Richard A. ; et al. | 2009-04-23 |
Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device
Grant 6,960,523 - Maldei , et al. November 1, 2 | 2005-11-01 |
Reduced cap layer erosion for borderless contacts
Grant 6,890,815 - Faltermeier , et al. May 10, 2 | 2005-05-10 |
Vapor phase etch trim structure with top etch blocking layer
Grant 6,884,734 - Buehrer , et al. April 26, 2 | 2005-04-26 |
Reduced Cap Layer Erosion For Borderless Contacts
App 20050051839 - Faltermeier, Johnathan ; et al. | 2005-03-10 |
Gate linewidth tailoring and critical dimension control for sub-100 nm devices using plasma etching
Grant 6,864,041 - Brown , et al. March 8, 2 | 2005-03-08 |
Vapor phase etch trim structure with top etch blocking layer
App 20040198030 - Buehrer, Frederick W. ; et al. | 2004-10-07 |
Method of reducing erosion of a nitride gate cap layer during reactive ion etch of nitride liner layer for bit line contact of DRAM device
App 20040195607 - Maldei, Michael ; et al. | 2004-10-07 |
Selective nitride: oxide anisotropic etch process
Grant 6,656,375 - Armacost , et al. December 2, 2 | 2003-12-02 |
Wet etch reduction of gate widths
Grant 6,617,085 - Kanh , et al. September 9, 2 | 2003-09-09 |
Method to controllably form notched polysilicon gate structures
Grant 6,541,320 - Brown , et al. April 1, 2 | 2003-04-01 |
Dual Layer Hard Mask For Edram Gate Etch Process
App 20030032269 - Dobuzinsky, David Mark ; et al. | 2003-02-13 |
Method To Controllably Form Notched Polysilicon Gate Structures
App 20030032225 - Brown, Jeffery ; et al. | 2003-02-13 |
Gate linewidth tailoring and critical dimension control for sub-100 nm devices using plasma etching
App 20020164546 - Brown, Jeffrey J. ; et al. | 2002-11-07 |
Fabrication of notched gates by passivating partially etched gate sidewalls and then using an isotropic etch
App 20020132437 - Tsou, Len Y. ; et al. | 2002-09-19 |
Dual Mask Process For Semiconductor Devices
App 20020094637 - Liu, Joyce C. ; et al. | 2002-07-18 |
Method for preparing the surface of a dielectric
App 20010016226 - Natzle, Wesley ; et al. | 2001-08-23 |
Vapor phase etching of oxide masked by resist or masking material
Grant 6,074,951 - Kleinhenz , et al. June 13, 2 | 2000-06-13 |
Method of patterning sidewalls of a trench in integrated circuit manufacturing
Grant 6,071,815 - Kleinhenz , et al. June 6, 2 | 2000-06-06 |
Oxide layer patterned by vapor phase etching
Grant 5,876,879 - Kleinhenz , et al. March 2, 1 | 1999-03-02 |
Trench sidewall patterned by vapor phase etching
Grant 5,838,055 - Kleinhenz , et al. November 17, 1 | 1998-11-17 |
Film removal by chemical transformation and aerosol clean
Grant 5,792,275 - Natzle , et al. August 11, 1 | 1998-08-11 |
Oxide strip that improves planarity
Grant 5,766,971 - Ahlgren , et al. June 16, 1 | 1998-06-16 |
Sealed chamber with heating lamps provided within transparent tubes
Grant 5,636,320 - Yu , et al. June 3, 1 | 1997-06-03 |
Supersonic molecular beam etching of surfaces
Grant 5,286,331 - Chen , et al. February 15, 1 | 1994-02-15 |
Device and method for accurate etching and removal of thin film
Grant 5,282,925 - Jeng , et al. February 1, 1 | 1994-02-01 |
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