Yoon; Sei Seung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yoon; Sei Seung.The latest application filed is for "memory repair enablement".

Company Profile

3.97.80

Yoon; Sei Seung - San Diego CA
Yoon; Sei Seung - Santa Clara CA
Yoon; Sei-Seung - Cupertino CA
Yoon; Sei-seung - Seoul KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory repair enablement Grant 10,713,136 - Ahmed , et al.	2020-07-14
Flexible power sequencing for dual-power memory Grant 10,446,196 - Narasimhan , et al. Oc	2019-10-15
Systems and methods to provide security to one time program data Grant 10,318,726 - Kota , et al.	2019-06-11
Memory Repair Enablement App 20190095295 - AHMED; Fahad ; et al.	2019-03-28
Voltage droop control Grant 10,133,285 - Patil , et al. November 20, 2	2018-11-20
Flexible memory assistance scheme Grant 10,049,729 - Terzioglu , et al. August 14, 2	2018-08-14
High-speed level shifter Grant 9,997,208 - Jung , et al. June 12, 2	2018-06-12
Lower power high speed decoding based dynamic tracking for memories Grant 9,978,442 - Liang , et al. May 22, 2	2018-05-22
Timed sense amplifier circuits and methods in a semiconductor memory Grant 9,959,912 - Jung , et al. May 1, 2	2018-05-01
Apparatus and method for latching data including AND-NOR or OR-NAND gate and feedback paths Grant 9,941,881 - Jung , et al. April 10, 2	2018-04-10
High-speed word line decoder and level-shifter Grant 9,940,987 - Jung , et al. April 10, 2	2018-04-10
Lower Power High Speed Decoding Based Dynamic Tracking For Memories App 20180068714 - LIANG; Bin ; et al.	2018-03-08
Voltage Droop Control App 20180046209 - Patil; Sanjay Bhagawan ; et al.	2018-02-15
Voltage droop control Grant 9,851,730 - Patil , et al. December 26, 2	2017-12-26
Systems and Methods to Provide Security to One Time Program Data App 20170300251 - Kota; Anil ; et al.	2017-10-19
Efficient coding for memory redundancy Grant 9,748,003 - Jung , et al. August 29, 2	2017-08-29
Timed Sense Amplifier Circuits And Methods In A Semiconductor Memory App 20170221551 - JUNG; Chulmin ; et al.	2017-08-03
Scannable memories with robust clocking methodology to prevent inadvertent reads or writes Grant 9,666,301 - Boynapalli , et al. May 30, 2	2017-05-30
Memory cell with improved write margin Grant 9,646,681 - Jung , et al. May 9, 2	2017-05-09
Memory with a voltage-adjustment circuit to adjust the operating voltage of memory cells for BTI effect screening Grant 9,627,041 - Jung , et al. April 18, 2	2017-04-18
System and method for reducing programming voltage stress on memory cell devices Grant 9,570,192 - Yoon , et al. February 14, 2	2017-02-14
Apparatus and method for writing data to memory array circuits Grant 9,536,578 - Jung , et al. January 3, 2	2017-01-03
Mask-programmed read only memory with enhanced security Grant 9,484,110 - Yoon , et al. November 1, 2	2016-11-01
Voltage Droop Control App 20160299517 - Patil; Sanjay Bhagawan ; et al.	2016-10-13
High-speed Word Line Decoder And Level-shifter App 20160276005 - Jung; Chulmin ; et al.	2016-09-22
Write driver for memory Grant 9,401,201 - Jung , et al. July 26, 2	2016-07-26
Sense amplifier with pulsed control for pull-up transistors Grant 9,373,388 - Ahmed , et al. June 21, 2	2016-06-21
Pseudo dual port memory with dual latch flip-flop Grant 9,324,416 - Yoon , et al. April 26, 2	2016-04-26
Method and apparatus for low-level input sense amplification Grant 9,318,165 - Jung , et al. April 19, 2	2016-04-19
Efficient Coding For Memory Redundancy App 20160078969 - Jung; Chulmin ; et al.	2016-03-17
Scannable Memories With Robust Clocking Methodology To Prevent Inadvertent Reads Or Writes App 20160078965 - Boynapalli; Venugopal ; et al.	2016-03-17
Pseudo Dual Port Memory App 20160055903 - YOON; Sei Seung ; et al.	2016-02-25
N-well switching circuit Grant 9,252,765 - Terzioglu , et al. February 2, 2	2016-02-02
Write word-line assist circuitry for a byte-writeable memory Grant 9,202,555 - Jung , et al. December 1, 2	2015-12-01
Apparatus and method for reading data from multi-bank memory circuits Grant 9,165,619 - Song , et al. October 20, 2	2015-10-20
High Speed Deglitch Sense Amplifier App 20150294697 - Jung; Chulmin ; et al.	2015-10-15
Memory Having A Pull-up Circuit With Inputs Of Multiple Voltage Domains App 20150279452 - YOON; Sei Seung ; et al.	2015-10-01
Edge-triggered Pulse Latch App 20150279451 - Jung; Chulmin ; et al.	2015-10-01
Method And Apparatus For Low-level Input Sense Amplification App 20150269978 - Jung; Chulmin ; et al.	2015-09-24
Memory timing circuit Grant 9,111,589 - Sinha , et al. August 18, 2	2015-08-18
Level Shifters For Systems With Multiple Voltage Domains App 20150228314 - BAI; Xiaoliang ; et al.	2015-08-13
Weak keeper circuit for memory device Grant 9,082,465 - Ganesan , et al. July 14, 2	2015-07-14
Static NAND cell for ternary content addressable memory (TCAM) Grant 9,082,481 - Terzioglu , et al. July 14, 2	2015-07-14
N-well switching circuit Grant 9,082,498 - Uvieghara , et al. July 14, 2	2015-07-14
Method and semiconductor apparatus for reducing power when transmitting data between devices in the semiconductor apparatus Grant 9,071,239 - Jung , et al. June 30, 2	2015-06-30
High frequency pseudo dual port memory Grant 9,064,556 - Gulati , et al. June 23, 2	2015-06-23
Reduced-area Architecture For Asymmetric Interconnect App 20150161067 - BOWLES; Kevin Robert ; et al.	2015-06-11
Read/write assist for memories Grant 9,030,863 - Gulati , et al. May 12, 2	2015-05-12
High Frequency Pseudo Dual Port Memory App 20150109865 - Gulati; Chirag ; et al.	2015-04-23
Static Nand Cell For Ternary Content Addressable Memory (tcam) App 20150085554 - Terzioglu; Esin ; et al.	2015-03-26
Read/write Assist For Memories App 20150085568 - GULATI; Chirag ; et al.	2015-03-26
Memory Access Time Tracking In Dual-rail Systems App 20150067290 - CHABA; Ritu ; et al.	2015-03-05
Memory Timing Circuit App 20150063046 - SINHA; Rakesh Kumar ; et al.	2015-03-05
Wide range multiport bitcell Grant 8,971,096 - Jung , et al. March 3, 2	2015-03-03
Static NAND cell for ternary content addressable memory (TCAM) Grant 8,958,226 - Terzioglu , et al. February 17, 2	2015-02-17
N-well Switching Circuit App 20150043265 - Uvieghara; Gregory Ameriada ; et al.	2015-02-12
Wide Range Multiport Bitcell App 20150029782 - Jung; Changho ; et al.	2015-01-29
Mask-programmed Read Only Memory With Enhanced Security App 20150029778 - Yoon; Sei Seung ; et al.	2015-01-29
Hybrid ternary content addressable memory Grant 8,934,278 - Vattikonda , et al. January 13, 2	2015-01-13
Memory with multiple word line design Grant 8,929,153 - Gulati , et al. January 6, 2	2015-01-06
N-well Switching Circuit App 20140369152 - Terzioglu; Esin ; et al.	2014-12-18
Apparatus And Method For Reading Data From Multi-bank Memory Circuits App 20140321217 - Song; Hui ; et al.	2014-10-30
Apparatus And Method For Writing Data To Memory Array Circuits App 20140269112 - Jung; Chulmin ; et al.	2014-09-18
Method And Semiconductor Apparatus For Reducing Power When Transmitting Data Between Devices In The Semiconductor Apparatus App 20140266398 - Jung; Chulmin ; et al.	2014-09-18
Low voltage fuse-based memory with high voltage sense amplifier Grant 8,830,779 - Terzioglu , et al. September 9, 2	2014-09-09
System and method of performing power on reset for memory array circuits Grant 8,830,780 - Jung , et al. September 9, 2	2014-09-09
Weak Keeper Circuit For Memory Device App 20140226418 - Ganesan; Balachander ; et al.	2014-08-14
N-well switching circuit Grant 8,787,096 - Terzioglu , et al. July 22, 2	2014-07-22
N-well Switching Circuit App 20140198588 - Terzioglu; Esin ; et al.	2014-07-17
System And Method Of Performing Power On Reset For Memory Array Circuits App 20140198598 - Jung; Changho ; et al.	2014-07-17
Hybrid Ternary Content Addressable Memory App 20140185348 - Vattikonda; Rakesh ; et al.	2014-07-03
Static Nand Cell For Ternary Content Addressable Memory (tcam) App 20140185349 - Terzioglu; Esin ; et al.	2014-07-03
Write Word-line Assist Circuitry For A Byte-writeable Memory App 20140112061 - Jung; Changho ; et al.	2014-04-24
Power-on-reset (POR) circuits for resetting memory devices, and related circuits, systems, and methods Grant 8,605,536 - Terzioglu , et al. December 10, 2	2013-12-10
Circuits configured to remain in a non-program state during a power-down event Grant 8,599,597 - Terzioglu , et al. December 3, 2	2013-12-03
Circuits Configured To Remain In A Non-program State During A Power-down Event App 20130294139 - Terzioglu; Esin ; et al.	2013-11-07
System and method of leakage control in an asynchronous system Grant 8,527,797 - Kong , et al. September 3, 2	2013-09-03
Power-On-Reset (POR) Circuits for Resetting Memory Devices, and Related Circuits, Systems, and Methods App 20130208556 - Terzioglu; Esin ; et al.	2013-08-15
Code-based differential charging of bit lines of a sense amplifier Grant 8,498,169 - Rao , et al. July 30, 2	2013-07-30
Magnetic element utilizing protective sidewall passivation Grant 8,482,966 - Kang , et al. July 9, 2	2013-07-09
Registers with full scan capability Grant 8,438,433 - Rao , et al. May 7, 2	2013-05-07
Code-Based Differential Charging of Bit Lines of a Sense Amplifier App 20130058172 - Rao; Hari M. ; et al.	2013-03-07
System and method of operating a memory device Grant 8,279,659 - Cho , et al. October 2, 2	2012-10-02
Memory device for resistance-based memory applications Grant 8,228,714 - Davierwalla , et al. July 24, 2	2012-07-24
Memory read stability using selective precharge Grant 8,223,567 - Abu Rahma , et al. July 17, 2	2012-07-17
System and method of resistance based memory circuit parameter adjustment Grant 8,161,430 - Jung , et al. April 17, 2	2012-04-17
Data integrity preservation in spin transfer torque magnetoresistive random access memory Grant 8,159,864 - Yoon , et al. April 17, 2	2012-04-17
Write operation for spin transfer torque magnetoresistive random access memory with reduced bit cell size Grant 8,144,509 - Jung , et al. March 27, 2	2012-03-27
Registers with Full Scan Capability App 20120072793 - Rao; Hari M. ; et al.	2012-03-22
Dual power scheme in memory circuit Grant 8,139,426 - Park , et al. March 20, 2	2012-03-20
Data protection scheme during power-up in spin transfer torque magnetoresistive random access memory Grant 8,134,856 - Yoon , et al. March 13, 2	2012-03-13
Flexible word-line pulsing for STT-MRAM Grant 8,130,535 - Rao , et al. March 6, 2	2012-03-06
System and method to read and write data a magnetic tunnel junction element Grant 8,130,534 - Abu-Rahma , et al. March 6, 2	2012-03-06
Word line voltage control in STT-MRAM Grant 8,107,280 - Yoon , et al. January 31, 2	2012-01-31
System and method of pulse generation Grant 8,102,720 - Rao , et al. January 24, 2	2012-01-24
Self-timing for a multi-ported memory system Grant 8,082,401 - Rao , et al. December 20, 2	2011-12-20
Bit line voltage control in spin transfer torque magnetoresistive random access memory Grant 8,027,206 - Yoon , et al. September 27, 2	2011-09-27
Read disturb reduction circuit for spin transfer torque magnetoresistive random access memory Grant 8,004,880 - Yoon , et al. August 23, 2	2011-08-23
MRAM device with shared source line Grant 7,995,378 - Yoon , et al. August 9, 2	2011-08-09
Process variation tolerant memory design Grant 7,979,832 - Jung , et al. July 12, 2	2011-07-12
System and Method of Operating a Memory Device App 20110110174 - Cho; Sung Il ; et al.	2011-05-12
Digitally-controllable delay for sense amplifier Grant 7,936,590 - Park , et al. May 3, 2	2011-05-03
In-situ resistance measurement for magnetic random access memory (MRAM) Grant 7,929,334 - Rao , et al. April 19, 2	2011-04-19
Flexible Word-Line Pulsing For STT-MRAM App 20110051502 - Rao; Hari M. ; et al.	2011-03-03
Balancing a signal margin of a resistance based memory circuit Grant 7,889,585 - Jung , et al. February 15, 2	2011-02-15
Adapting word line pulse widths in memory systems Grant 7,882,407 - Abu-Rahma , et al. February 1, 2	2011-02-01
Controlled value reference signal of resistance based memory circuit Grant 7,813,166 - Jung , et al. October 12, 2	2010-10-12
Self-Timing For A Multi-Ported Memory System App 20100250865 - Rao; Hari ; et al.	2010-09-30
Bit Line Voltage Control In Spin Transfer Torque Magnetoresistive Random Access Memory App 20100195376 - Yoon; Sei Seung ; et al.	2010-08-05
System and Method of Pulse Generation App 20100195379 - Rao; Hari ; et al.	2010-08-05
In-situ Resistance Measurement For Magnetic Random Access Memory (mram) App 20100188894 - Rao; Hari ; et al.	2010-07-29
Spin transfer torque magnetoresistive random access memory and design methods Grant 7,764,537 - Jung , et al. July 27, 2	2010-07-27
Memory device with configurable delay tracking Grant 7,755,964 - Jung , et al. July 13, 2	2010-07-13
System And Method To Read And Write Data A Magnetic Tunnel Junction Element App 20100172173 - Abu-Rahma; Mohamed Hassan ; et al.	2010-07-08
Balancing A Signal Margin Of A Resistance Based Memory Circuit App 20100157654 - Jung; Seong-Ook ; et al.	2010-06-24
Word line transistor strength control for read and write in spin transfer torque magnetoresistive random access memory Grant 7,742,329 - Yoon , et al. June 22, 2	2010-06-22
Digitally-Controllable Delay for Sense Amplifier App 20100142303 - Park; Dongkyu ; et al.	2010-06-10
Data Integrity Preservation In Spin Transfer Torque Magnetoresistive Random Access Memory App 20100142260 - Yoon; Sei Seung ; et al.	2010-06-10
Data Protection Scheme during Power-Up in Spin Transfer Torque Magnetoresistive Random Access Memory App 20100110776 - Yoon; Sei Seung ; et al.	2010-05-06
Word Line Voltage Control in STT-MRAM App 20100110775 - Yoon; Sei Seung ; et al.	2010-05-06
CMOS level shifter circuit design Grant 7,710,183 - Chaba , et al. May 4, 2	2010-05-04
Magnetic Element Utilizing Protective Sidewall Passivation App 20100072566 - Kang; Seung H. ; et al.	2010-03-25
Memory Device for Resistance-Based Memory Applications App 20100061144 - Davierwalla; Anosh B. ; et al.	2010-03-11
CMOS Level Shifter Circuit Design App 20100052763 - Chaba; Ritu ; et al.	2010-03-04
System and method of selectively applying negative voltage to wordlines during memory device read operation Grant 7,672,175 - Yoon , et al. March 2, 2	2010-03-02
Dual Power Scheme in Memory Circuit App 20100039872 - Park; Dongkyu ; et al.	2010-02-18
Write Operation for Spin Transfer Torque Magnetoresistive Random Access Memory with Reduced Bit Cell Size App 20090323404 - Jung; Seong-Ook ; et al.	2009-12-31
Controlled Value Reference Signal of Resistance Based Memory Circuit App 20090323405 - Jung; Seong-Ook ; et al.	2009-12-31
System and Method of Resistance Based Memory Circuit Parameter Adjustment App 20090265678 - Jung; Seong-Ook ; et al.	2009-10-22
Content addressable memory with mixed serial and parallel search Grant 7,577,785 - Yoon , et al. August 18, 2	2009-08-18
System and Method of Selectively Applying Negative Voltage to Wordlines During Memory Device Read Operation App 20090180315 - Yoon; Sei Seung ; et al.	2009-07-16
System and Method of Leakage Control in an Asynchronous System App 20090172452 - Kong; Xiaohua ; et al.	2009-07-02
MRAM Device with Shared Source Line App 20090161413 - Yoon; Sei Seung ; et al.	2009-06-25
Memory Read Stability Using Selective Precharge App 20090154274 - Abu-Rahma; Mohamed R. ; et al.	2009-06-18
Adapting Word Line Pulse Widths in Memory Systems App 20090158101 - Abu-Rahma; Mohamed Hassan ; et al.	2009-06-18
Ground Level Precharge Bit Line Scheme for Read Operation in Spin Transfer Torque Magnetoresistive Random Access Memory App 20090103354 - Yoon; Sei Seung ; et al.	2009-04-23
Open digit line array architecture for a memory array Grant 7,512,025 - Yoon , et al. March 31, 2	2009-03-31
Spin Transfer Torque Magnetoresistive Random Access Memory and Design Methods App 20080247222 - Jung; Seong-Ook ; et al.	2008-10-09
Read Disturb Reduction Circuit for Spin Transfer Torque Magnetoresistive Random Access Memory App 20080219044 - Yoon; Sei Seung ; et al.	2008-09-11
Word Line Transistor Strength Control for Read and Write in Spin Transfer Torque Magnetoresistive Random Access Memory App 20080219043 - Yoon; Sei Seung ; et al.	2008-09-11
Process Variation Tolerant Memory Design App 20080141190 - Jung; Seong-Ook ; et al.	2008-06-12
Open digit line array architecture for a memory array App 20080137458 - Yoon; Sei Seung ; et al.	2008-06-12
Memory Device With Configurable Delay Tracking App 20080101143 - Jung; Seong-Ook ; et al.	2008-05-01
Open digit line array architecture for a memory array Grant 7,345,937 - Yoon , et al. March 18, 2	2008-03-18
Single data line sensing scheme for TCCT-based memory cells Grant 7,324,394 - Yoon , et al. January 29, 2	2008-01-29
Open digit line array architecture for a memory array Grant 7,277,310 - Yoon , et al. October 2, 2	2007-10-02
Open digit line array architecture for a memory array Grant 7,254,074 - Yoon , et al. August 7, 2	2007-08-07
Content addressable memory with mixed serial and parallel search App 20070079058 - Yoon; Sei Seung ; et al.	2007-04-05
Open digit line array architecture for a memory array Grant 7,193,914 - Yoon , et al. March 20, 2	2007-03-20
Open digit line array architecture for a memory array App 20060268640 - Yoon; Sei Seung ; et al.	2006-11-30
Open digit line array architecture for a memory array App 20060268638 - Yoon; Sei Seung ; et al.	2006-11-30
Open digit line array architecture for a memory array App 20060268639 - Yoon; Sei Seung ; et al.	2006-11-30
Open digit line array architecture for a memory array App 20060198220 - Yoon; Sei Seung ; et al.	2006-09-07
Single data line sensing scheme for TCCT-based memory cells Grant 7,006,398 - Yoon , et al. February 28, 2	2006-02-28
Bit line control and sense amplification for TCCT-based memory cells Grant 6,958,931 - Yoon , et al. October 25, 2	2005-10-25
Single data line sensing scheme for TCCT-based memory cells Grant 6,903,987 - Yoon , et al. June 7, 2	2005-06-07
Circuit and method for implementing a write operation with TCCT-based memory cells Grant 6,735,113 - Yoon , et al. May 11, 2	2004-05-11
Circuit And Method For Implementing A Write Operation With Tcct-based Memory Cells App 20040071013 - Yoon, Sei-Seung ; et al.	2004-04-15
Bit line control and sense amplification for TCCT-based memory cells Grant 6,721,220 - Yoon , et al. April 13, 2	2004-04-13
Single data line sensing scheme for TCCT-based memory cells App 20040022109 - Yoon, Sei-Seung ; et al.	2004-02-05
Bit Line Control And Sense Amplification For Tcct-based Memory Cells App 20040004880 - Yoon, Sei-Seung ; et al.	2004-01-08
Internal clock signal delay circuit and method for delaying internal clock signal in semiconductor device Grant 6,529,423 - Yoon , et al. March 4, 2	2003-03-04
Method for fabricating a capacitor for a dynamic random access memory cell Grant 6,184,078 - Yoon , et al. February 6, 2	2001-02-06
Voltage boosting circuits having backup voltage boosting capability Grant 5,796,293 - Yoon , et al. August 18, 1	1998-08-18
Voltage pumping circuit for semiconductor memory device Grant 5,781,494 - Bae , et al. July 14, 1	1998-07-14
Boosting voltage circuit used in active cycle of a semiconductor memory device Grant 5,608,677 - Yoon , et al. March 4, 1	1997-03-04
Semiconductor memory using low power supply voltage Grant 5,438,543 - Yoon August 1, 1	1995-08-01
Semiconductor memory device having self-refresh and back-bias circuitry Grant 5,315,557 - Kim , et al. May 24, 1	1994-05-24