Yokota; Toshihiko

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yokota; Toshihiko.The latest application filed is for "design structure of an integration circuit and test method of the integrated circuit".

Company Profile

0.7.8

Yokota; Toshihiko - Kyoto JP
Yokota; Toshihiko - Kyoto-fu JP
Yokota; Toshihiko - Kyoto-city JP
Yokota; Toshihiko - Kyoto-shi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Logic transformation and gate placement to avoid routing congestion Grant 8,161,445 - Bhat , et al. April 17, 2	2012-04-17
Logic transformation and gate placement to avoid routing congestion Grant 8,006,210 - Bhat , et al. August 23, 2	2011-08-23
Circuit for controlling voltage fluctuation in integrated circuit Grant 7,930,608 - Yokota April 19, 2	2011-04-19
Microcomputer and method of testing the same Grant 7,793,183 - Yokota , et al. September 7, 2	2010-09-07
Method and circuit for LSSD testing Grant 7,752,513 - Namura , et al. July 6, 2	2010-07-06
Design structure of an integration circuit and test method of the integrated circuit Grant 7,752,586 - Yokota July 6, 2	2010-07-06
Design Structure Of An Integration Circuit And Test Method Of The Integrated Circuit App 20090132973 - Yokota; Toshihiko	2009-05-21
Microcomputer and Method of Testing The Same App 20090119561 - Yokota; Toshihiko ; et al.	2009-05-07
Circuit For Controlling Voltage Fluctuation In Integrated Circuit App 20080209292 - Yokota; Toshihiko	2008-08-28
Logic Transformation And Gate Placement To Avoid Routing Congestion App 20080134110 - Bhat; Chaitra M. ; et al.	2008-06-05
Logic Transformation And Gate Placement To Avoid Routing Congestion App 20080115094 - Bhat; Chaitra M. ; et al.	2008-05-15
Logic transformation and gate placement to avoid routing congestion Grant 7,356,797 - Bhat , et al. April 8, 2	2008-04-08
Method And Circuit For Lssd Testing App 20070198882 - Namura; Ken ; et al.	2007-08-23
Integration Circuit And Test Method Of The Same App 20070124635 - Yokota; Toshihiko	2007-05-31
Logic transformation and gate placement to avoid routing congestion App 20060282809 - Bhat; Chaitra M. ; et al.	2006-12-14

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