loadpatents
name:-0.0015928745269775
name:-0.0098659992218018
name:-0.0032031536102295
Yishay; Oded Patent Filings

Yishay; Oded

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yishay; Oded.The latest application filed is for "vector nco and twiddle factor generator".

Company Profile
0.12.2
  • Yishay; Oded - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Efficient engine and algorithm for control and data multiplexing/demultiplexing in 5G NR devices
Grant 11,165,482 - Mundarath , et al. November 2, 2
2021-11-02
Vector NCO and twiddle factor generator
Grant 9,087,003 - Dehner , et al. July 21, 2
2015-07-21
Vector NCO and Twiddle Factor Generator
App 20140122553 - Dehner; Leo G. ;   et al.
2014-05-01
Breakpoint detection circuit in a data processor and method therefor
Grant 5,717,851 - Yishay , et al. February 10, 1
1998-02-10
Method and apparatus in a data processing system for selectively inserting bus cycle idle time
Grant 5,664,168 - Yishay , et al. September 2, 1
1997-09-02
Reset configuration in a data processing system and method therefor
Grant 5,623,687 - Yishay , et al. April 22, 1
1997-04-22
Flexible reset configuration of a data processing system and method therefor
Grant 5,606,715 - Yishay , et al. February 25, 1
1997-02-25
Integrated circuit data processor which provides external sensibility of internal signals during reset
Grant 5,574,894 - Iles , et al. November 12, 1
1996-11-12
Data processor and method for providing show cycles on a fast multiplexed bus
Grant 5,548,794 - Yishay , et al. August 20, 1
1996-08-20
Method and apparatus for performing multiplexed and non-multiplexed bus cycles in a data processing system
Grant 5,483,660 - Yishay , et al. January 9, 1
1996-01-09
Method and apparatus for scan testing an array in a data processing system
Grant 5,414,714 - Gladden , et al. May 9, 1
1995-05-09
Method and apparatus for implementing a priority adjustment of an interrupt in a data processor
Grant 5,257,357 - Yishay , et al. October 26, 1
1993-10-26

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