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Patent applications and USPTO patent grants for Yin; Patrick.The latest application filed is for "method and system for allowing an integrated circuit to be portably generated from one manufacturing process to another".
Patent | Date |
---|---|
Method and system for allowing an integrated circuit to be portably generated from one manufacturing process to another Grant 6,298,469 - Yin October 2, 2 | 2001-10-02 |
Low leakage output driver circuit which can be utilized in a multi-voltage source Grant 5,723,992 - Yin , et al. March 3, 1 | 1998-03-03 |
Symmetrical multi-layer metal logic array with extension portions for increased gate density and a testability area Grant 5,635,737 - Yin June 3, 1 | 1997-06-03 |
Automatic logic model generation from schematic data base Grant 5,463,563 - Bair , et al. October 31, 1 | 1995-10-31 |
Symmetrical multi-layer metal logic array with continuous substrate taps and extension portions for increased gate density Grant 5,384,472 - Yin January 24, 1 | 1995-01-24 |
Automatic logic model generation from schematic data base Grant 5,278,769 - Bair , et al. January 11, 1 | 1994-01-11 |
Tri-state CMOS driver having reduced gate delay Grant 4,465,945 - Yin August 14, 1 | 1984-08-14 |
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