Yeung; Raymond Cheung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yeung; Raymond Cheung.The latest application filed is for "method and apparatus for increasing thread priority in response to flush information in a multi-threaded processor of an information handling system".

Company Profile

0.12.12

Yeung; Raymond Cheung - Round Rock TX US
Yeung; Raymond Cheung - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors Grant 8,418,180 - Bishop , et al. April 9, 2	2013-04-09
Method and apparatus for thread priority control in a multi-threaded processor based upon branch issue information including branch confidence information Grant 8,255,669 - Gschwind , et al. August 28, 2	2012-08-28
Method and apparatus for inhibiting fetch throttling when a processor encounters a low confidence branch instruction in an information handling system Grant 8,006,070 - Gschwind , et al. August 23, 2	2011-08-23
Method and apparatus for controlling memory array gating when a processor executes a low confidence branch instruction in an information handling system Grant 7,925,853 - Gschwind , et al. April 12, 2	2011-04-12
Method and apparatus for back to back issue of dependent instructions in an out of order issue queue Grant 7,669,038 - Burky , et al. February 23, 2	2010-02-23
Dynamic recalculation of resource vector at issue queue for steering of dependent instructions Grant 7,650,486 - Le , et al. January 19, 2	2010-01-19
Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors Grant 7,631,308 - Bishop , et al. December 8, 2	2009-12-08
Method and apparatus for conserving power by throttling instruction fetching when a processor encounters low confidence branches in an information handling system Grant 7,627,742 - Bose , et al. December 1, 2	2009-12-01
Method And Apparatus For Thread Priority Control In A Multi-threaded Processor Of An Information Handling System App 20090193231 - Gschwind; Michael Karl ; et al.	2009-07-30
Method And Apparatus For Increasing Thread Priority In Response To Flush Information In A Multi-threaded Processor Of An Information Handling System App 20090193240 - Gschwind; Michael Karl ; et al.	2009-07-30
Method and Apparatus for Controlling Memory Array Gating when a Processor Executes a Low Confidence Branch Instruction in an Information Handling System App 20090177858 - Gschwind; Michael Karl ; et al.	2009-07-09
Method and Apparatus for Inhibiting Fetch Throttling When a Processor Encounters a Low Confidence Branch Instruction in an Information Handling System App 20090150657 - Gschwind; Michael Karl ; et al.	2009-06-11
Method using vector component comprising first and second bits to regulate movement of dependent instructions in a microprocessor Grant 7,490,226 - Le , et al. February 10, 2	2009-02-10
Thread Priority Method for Ensuring Processing Fairness in Simultaneous Multi-Threading Microprocessors App 20080294884 - Bishop; James Wilson ; et al.	2008-11-27
Method and Apparatus for Conserving Power by Throttling Instruction Fetching When a Processor Encounters Low Confidence Branches in an Information Handling System App 20080256345 - Bose; Pradip ; et al.	2008-10-16
Method and Apparatus for Back to Back Issue of Dependent Instructions in an Out of Order Issue Queue App 20080209178 - Burky; William Elton ; et al.	2008-08-28
Method and apparatus for back to back issue of dependent instructions in an out of order issue queue Grant 7,380,104 - Burky , et al. May 27, 2	2008-05-27
Method And Apparatus For Back To Back Issue Of Dependent Instructions In An Out Of Order Issue Queue App 20070250687 - Burky; William Elton ; et al.	2007-10-25
Thread priority method, apparatus, and computer program product for ensuring processing fairness in simultaneous multi-threading microprocessors App 20060184946 - Bishop; James Wilson ; et al.	2006-08-17
Method using hazard vector to enhance issue throughput of dependent instructions in a microprocessor App 20060179282 - Le; Hung Qui ; et al.	2006-08-10
Apparatus and method for dependency tracking and register file bypass controls using a scannable register file App 20060168393 - Christensen; Bjorn Peter ; et al.	2006-07-27
Mechanism for effectively handling livelocks in a simultaneous multithreading processor Grant 7,000,047 - Nguyen , et al. February 14, 2	2006-02-14
Mechanism for effectively handling livelocks in a simultaneous multithreading processor App 20040215933 - Nguyen, Dung Quoc ; et al.	2004-10-28

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