loadpatents
name:-0.027230978012085
name:-0.022032022476196
name:-0.016489028930664
Yeoh; Andrew W. Patent Filings

Yeoh; Andrew W.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yeoh; Andrew W..The latest application filed is for "multi version library cell handling and integrated circuit structures fabricated therefrom".

Company Profile
18.21.29
  • Yeoh; Andrew W. - Portland OR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Plugs for interconnect lines for advanced integrated circuit structure fabrication
Grant 11,404,559 - Yeoh , et al. August 2, 2
2022-08-02
Multi Version Library Cell Handling And Integrated Circuit Structures Fabricated Therefrom
App 20220149075 - KUMAR; Ranjith ;   et al.
2022-05-12
Multi version library cell handling and integrated circuit structures fabricated therefrom
Grant 11,271,010 - Kumar , et al. March 8, 2
2022-03-08
Contact Over Active Gate Structures For Advanced Integrated Circuit Structure Fabrication
App 20210234022 - YEOH; Andrew W. ;   et al.
2021-07-29
Contact over active gate structures for advanced integrated circuit structure fabrication
Grant 11,031,487 - Yeoh , et al. June 8, 2
2021-06-08
Etch-stop layer topography for advanced integrated circuit structure fabrication
Grant 10,943,817 - Yeoh , et al. March 9, 2
2021-03-09
Heterogeneous Metal Line Compositions For Advanced Integrated Circuit Structure Fabrication
App 20210066475 - YEOH; Andrew W. ;   et al.
2021-03-04
Plugs For Interconnect Lines For Advanced Integrated Circuit Structure Fabrication
App 20210013323 - YEOH; Andrew W. ;   et al.
2021-01-14
Heterogeneous metal line compositions for advanced integrated circuit structure fabrication
Grant 10,854,731 - Yeoh , et al. December 1, 2
2020-12-01
Multi Version Library Cell Handling And Integrated Circuit Structures Fabricated Therefrom
App 20200357823 - KUMAR; Ranjith ;   et al.
2020-11-12
Plugs for interconnect lines for advanced integrated circuit structure fabrication
Grant 10,818,774 - Yeoh , et al. October 27, 2
2020-10-27
Etch-stop layer topography for advanced integrated circuit structure fabrication
Grant 10,796,951 - Yeoh , et al. October 6, 2
2020-10-06
Heterogeneous metal line compositions for advanced integrated circuit structure fabrication
Grant 10,777,655 - Yeoh , et al. Sept
2020-09-15
Contact Over Active Gate Structures For Advanced Integrated Circuit Structure Fabrication
App 20200105906 - YEOH; Andrew W. ;   et al.
2020-04-02
Pitch-divided Interconnects For Advanced Integrated Circuit Structure Fabrication
App 20200043850 - YEOH; Andrew W. ;   et al.
2020-02-06
Heterogeneous Metal Line Compositions For Advanced Integrated Circuit Structure Fabrication
App 20200044049 - YEOH; Andrew W. ;   et al.
2020-02-06
Etch-stop Layer Topography For Advanced Integrated Circuit Structure Fabrication
App 20200027781 - YEOH; Andrew W. ;   et al.
2020-01-23
Contact over active gate structures for advanced integrated circuit structure fabrication
Grant 10,541,316 - Yeoh , et al. Ja
2020-01-21
Pitch-divided Interconnects For Advanced Integrated Circuit Structure Fabrication
App 20190164890 - YEOH; Andrew W. ;   et al.
2019-05-30
Etch-stop Layer Topography For Advanced Integrated Circuit Structure Fabrication
App 20190164818 - YEOH; Andrew W. ;   et al.
2019-05-30
Contact Over Active Gate Structures For Advanced Integrated Circuit Structure Fabrication
App 20190164765 - Yeoh; Andrew W. ;   et al.
2019-05-30
Plugs For Interconnect Lines For Advanced Integrated Circuit Structure Fabrication
App 20190164814 - YEOH; Andrew W. ;   et al.
2019-05-30
Heterogeneous Metal Line Compositions For Advanced Integrated Circuit Structure Fabrication
App 20190164897 - YEOH; Andrew W. ;   et al.
2019-05-30
Thickened stress relief and power distribution layer
Grant 10,229,879 - Fischer , et al.
2019-03-12
Anchored interconnect
Grant 9,818,710 - Kang , et al. November 14, 2
2017-11-14
Necked interconnect fuse structure for integrated circuits
Grant 9,679,845 - Chen , et al. June 13, 2
2017-06-13
Anchored Interconnect
App 20170069589 - KANG; JIHO ;   et al.
2017-03-09
Necked Interconnect Fuse Structure For Integrated Circuits
App 20170018499 - Chen; Zhanping ;   et al.
2017-01-19
Thickened Stress Relief and Power Distribution Layer
App 20170011997 - Fischer; Kevin J. ;   et al.
2017-01-12
3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach
Grant 9,530,740 - Lee , et al. December 27, 2
2016-12-27
Thickened stress relief and power distribution layer
Grant 9,496,173 - Fischer , et al. November 15, 2
2016-11-15
3D interconnect structure comprising fine pitch single damascene backside metal redistribution lines combined with through-silicon vias
Grant 9,449,913 - Lee , et al. September 20, 2
2016-09-20
3D integrated circuit package with window interposer
Grant 9,391,013 - Mallik , et al. July 12, 2
2016-07-12
3d Interconnect Structure Comprising Through-silicon Vias Combined With Fine Pitch Backside Metal Redistribution Lines Fabricated Using A Dual Damascene Type Approach
App 20150364425 - Lee; Kevin J. ;   et al.
2015-12-17
3d Integrated Circuit Package With Window Interposer
App 20150332994 - MALLIK; Debendra ;   et al.
2015-11-19
3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach
Grant 9,142,510 - Lee , et al. September 22, 2
2015-09-22
3D integrated circuit package with window interposer
Grant 9,129,958 - Mallik , et al. September 8, 2
2015-09-08
Thickened Stress Relief And Power Distribution Layer
App 20150179562 - Fischer; Kevin J. ;   et al.
2015-06-25
3d Integrated Circuit Package With Window Interposer
App 20140191419 - Mallik; Debendra ;   et al.
2014-07-10
3d Interconnect Structure Comprising Through-silicon Vias Combined With Fine Pitch Backside Metal Redistribution Lines Fabricated Using A Dual Damascene Type Approach
App 20130285257 - Lee; Kevin J. ;   et al.
2013-10-31
3d Interconnect Structure Comprising Fine Pitch Single Damascene Backside Metal Redistribution Lines Combined With Through-silicon Vias
App 20130256910 - Lee; Kevin J. ;   et al.
2013-10-03

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