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name:-0.021450042724609
name:-0.0026950836181641
Yen; Kuang-Kai Patent Filings

Yen; Kuang-Kai

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yen; Kuang-Kai.The latest application filed is for "composite integrated circuits and methods for wireless interactions therewith".

Company Profile
3.20.16
  • Yen; Kuang-Kai - Kaohsiung TW
  • YEN; KUANG-KAI - Kaohsiung City TW
  • Yen; Kuang Kai - Hsinchu N/A TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Composite integrated circuits and methods for wireless interactions therewith
Grant 11,387,683 - Wang , et al. July 12, 2
2022-07-12
Composite Integrated Circuits And Methods For Wireless Interactions Therewith
App 20210013748 - WANG; MIN-JER ;   et al.
2021-01-14
Composite integrated circuits and methods for wireless interactions therewith
Grant 10,790,707 - Wang , et al. September 29, 2
2020-09-29
Composite Integrated Circuits and Methods for Wireless Interactions Therewith
App 20190140488 - WANG; MIN-JER ;   et al.
2019-05-09
Composite integrated circuits and methods for wireless interactions therewith
Grant 10,164,480 - Wang , et al. Dec
2018-12-25
Method and apparatus for RFID tag testing
Grant 10,031,161 - Li , et al. July 24, 2
2018-07-24
Composite Integrated Circuits And Methods For Wireless Interactions Therewith
App 20170242071 - WANG; Min-Jer ;   et al.
2017-08-24
DCO phase noise with PVT-insensitive calibration circuit in ADPLL applications
Grant 9,680,486 - Kuo , et al. June 13, 2
2017-06-13
Composite integrated circuits and methods for wireless interactions therewith
Grant 9,653,927 - Wang , et al. May 16, 2
2017-05-16
DCO Phase Noise With PVT-Insensitive Calibration Circuit in ADPLL Applications
App 20170070231 - KUO; Feng Wei ;   et al.
2017-03-09
All digital phase-locked loop
Grant 9,584,141 - Kuo , et al. February 28, 2
2017-02-28
All Digital Phase-locked Loop
App 20160294400 - KUO; Feng-Wei ;   et al.
2016-10-06
Phase-locked loop (PLL)
Grant 9,385,731 - Kuo , et al. July 5, 2
2016-07-05
Method and Apparatus for RFID Tag Testing
App 20160187380 - Lee; Tsung-Hsiung ;   et al.
2016-06-30
MCML retention flip-flop/latch for low power applications
Grant 9,350,324 - Lee , et al. May 24, 2
2016-05-24
Phase-locked loop (PLL)
Grant 9,319,053 - Kuo , et al. April 19, 2
2016-04-19
Method and apparatus for RFID tag testing
Grant 9,304,164 - Li , et al. April 5, 2
2016-04-05
Phase-locked Loop (pll)
App 20160020776 - Kuo; Feng Wei ;   et al.
2016-01-21
Phase-locked Loop (pll)
App 20160020775 - Kuo; Feng Wei ;   et al.
2016-01-21
Composite Integrated Circuits And Methods For Wireless Interactions Therewith
App 20150323589 - Wang; Min-Jer ;   et al.
2015-11-12
Phase-locked loop circuit
Grant 9,160,351 - Chen , et al. October 13, 2
2015-10-13
Method and apparatus of RFID tag contactless testing
Grant 9,098,757 - Lee , et al. August 4, 2
2015-08-04
Three-dimensional integrated circuit and method for wireless information access thereof
Grant 9,086,452 - Wang , et al. July 21, 2
2015-07-21
Phase-locked Loop Circuit
App 20150116018 - CHEN; Huan-Neng ;   et al.
2015-04-30
Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC)
Grant 8,884,670 - Yen , et al. November 11, 2
2014-11-11
Phase-locked loop circuit
Grant 8,816,735 - Chen , et al. August 26, 2
2014-08-26
Phase Locked Loop (pll) With Multi-phase Time-to-digital Converter (tdc)
App 20140210528 - Yen; Kuang-Kai ;   et al.
2014-07-31
Mcml Retention Flip-flop/latch For Low Power Applications
App 20140184296 - Lee; Tsung-Hsiung ;   et al.
2014-07-03
Method And Apparatus Of Rfid Tag Contactless Testing
App 20140145749 - Lee; Tsung-Hsiung ;   et al.
2014-05-29
Method and Apparatus for RFID Tag Testing
App 20140055155 - Li; Tsung-Hsiung ;   et al.
2014-02-27
Three-dimensional Integrated Circuit And Method For Wireless Information Access Thereof
App 20140043148 - WANG; Mill-Jer ;   et al.
2014-02-13
Method and apparatus of voltage scaling techniques
Grant 8,629,694 - Wang , et al. January 14, 2
2014-01-14
Phase locked loop (PLL) with multi-phase time-to-digital converter (TDC)
Grant 8,593,189 - Yen , et al. November 26, 2
2013-11-26
PVT-free calibration circuit for TDC resolution in ADPLL
Grant 8,570,082 - Kuo , et al. October 29, 2
2013-10-29

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