Yeh; Wen-Chin
Patent Applications and Registrations
Patent applications and USPTO patent grants for Yeh; Wen-Chin.The latest application filed is for "key inputting circuit of electronic device".
- Yeh; Wen-Chin - Fremont CA
- Yeh, Wen-Chin - Taichung City TW
- Yeh; Wen-Chin - Taipei TW
| Patent | Date |
|---|---|
| Method of forming an antifuse on a semiconductor substrate using wet oxidation of a nitrided substrate Grant 7,026,217 - Kamath , et al. April 11, 2 | 2006-04-11 |
| Key inputting circuit of electronic device App 20050068303 - Ho, Chi-Yu ; et al. | 2005-03-31 |
| Modular growth of multiple gate oxides Grant 6,812,158 - Yeh , et al. November 2, 2 | 2004-11-02 |
| Tungsten local interconnect for silicon integrated circuit structures, and method of making same Grant 6,329,720 - Li , et al. December 11, 2 | 2001-12-11 |
| Effective silicide blocking Grant 6,020,242 - Tsai , et al. February 1, 2 | 2000-02-01 |
| Nitrogen implanted polysilicon gate for MOSFET gate oxide hardening Grant 6,017,808 - Wang , et al. January 25, 2 | 2000-01-25 |
| Process for forming metal silicide contacts using amorphization of exposed silicon while minimizing device degradation Grant 6,010,952 - Tsai , et al. January 4, 2 | 2000-01-04 |
| Multi-mode adjustable piezoelectric transformer Grant 5,504,384 - Lee , et al. April 2, 1 | 1996-04-02 |
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