loadpatents
name:-0.028711080551147
name:-0.027651786804199
name:-0.014359951019287
Yeh; Jeng-Ya David Patent Filings

Yeh; Jeng-Ya David

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yeh; Jeng-Ya David.The latest application filed is for "semiconductor device and manufacturing method thereof".

Company Profile
12.25.28
  • Yeh; Jeng-Ya David - New Taipei TW
  • YEH; Jeng-Ya David - New Taipei City TW
  • Yeh; Jeng-Ya David - Portland OR
  • Yeh; Jeng-Ya David - Hsinchu TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor device and method of manufacturing the same
Grant 11,264,380 - Li , et al. March 1, 2
2022-03-01
Semiconductor device and method for manufacturing the same
Grant 11,145,730 - Chiang , et al. October 12, 2
2021-10-12
Semiconductor Device And Manufacturing Method Thereof
App 20210313437 - CHIANG; Hsin-Che ;   et al.
2021-10-07
Semiconductor device and manufacturing method thereof
Grant 11,043,567 - Chiang , et al. June 22, 2
2021-06-22
Semiconductor Device And A Method For Fabricating The Same
App 20210020633 - SHEN; Hsiang-Ku ;   et al.
2021-01-21
Isolation well doping with solid-state diffusion sources for finFET architectures
Grant 10,854,607 - Jan , et al. December 1, 2
2020-12-01
Self-aligned contact and manufacturing method thereof
Grant 10,825,907 - Lee , et al. November 3, 2
2020-11-03
Semiconductor device and a method for fabricating the same
Grant 10,797,048 - Shen , et al. October 6, 2
2020-10-06
Semiconductor device structures
Grant 10,755,970 - Chiang , et al. A
2020-08-25
Isolation Well Doping With Solid-state Diffusion Sources For Finfet Architectures
App 20200251471 - Kind Code
2020-08-06
Methods Of Integrating Multiple Gate Dielectric Transistors On A Tri-gate (finfet) Process
App 20200251470 - Kind Code
2020-08-06
Semiconductor device and a method for fabricating the same
Grant 10,734,283 - Chen , et al.
2020-08-04
Methods of integrating multiple gate dielectric transistors on a tri-gate (FINFET) process
Grant 10,658,361 - Tsai , et al.
2020-05-19
Doping with solid-state diffusion sources for finFET architectures
Grant 10,643,999 - Jan , et al.
2020-05-05
Semiconductor Device And Method For Manufacturing The Same
App 20200075741 - CHIANG; Hsin-Che ;   et al.
2020-03-05
Semiconductor Device And Method Of Manufacturing The Same
App 20200066718 - LI; Hou-Ju ;   et al.
2020-02-27
Semiconductor Device Structures
App 20190385896 - Chiang; Hsin-Che ;   et al.
2019-12-19
Semiconductor device and method for manufacturing the same
Grant 10,475,895 - Chiang , et al. Nov
2019-11-12
Doping With Solid-state Diffusion Sources For Finfet Architectures
App 20190287973 - Jan; Chia-Hong ;   et al.
2019-09-19
Method for fabricating a local interconnect in a semiconductor device
Grant 10,373,963 - Lai , et al.
2019-08-06
Doping with solid-state diffusion sources for finFET architectures
Grant 10,340,273 - Jan , et al.
2019-07-02
Semiconductor Device And Manufacturing Method Thereof
App 20190165117 - CHIANG; Hsin-Che ;   et al.
2019-05-30
Film deposition for 3D semiconductor structure
Grant 10,164,065 - Chiang , et al. Dec
2018-12-25
Self-aligned contact and manufacturing method thereof
Grant 10,164,032 - Lee , et al. Dec
2018-12-25
Semiconductor device and a method for fabricating the same
Grant 10,163,704 - Chen , et al. Dec
2018-12-25
Film Deposition For 3d Semiconductor Structure
App 20180350956 - CHIANG; Hsin-Che ;   et al.
2018-12-06
Self-Aligned Contact and Manufacturing Method Thereof
App 20180350927 - Lee; Tung Ying ;   et al.
2018-12-06
Semiconductor Device And Method For Manufacturing The Same
App 20180342595 - CHIANG; Hsin-Che ;   et al.
2018-11-29
Semiconductor Device And A Method For Fabricating The Same
App 20180337092 - CHEN; Hui-Chi ;   et al.
2018-11-22
Semiconductor device and a method for fabricating the same
Grant 10,134,872 - Chiou , et al. November 20, 2
2018-11-20
FinFET device with reduced parasitic capacitance and method for fabricating the same
Grant 10,128,156 - Chiang , et al. November 13, 2
2018-11-13
Methods of integrating multiple gate dielectric transistors on a tri-gate (finFET) process
Grant 10,096,599 - Tsai , et al. October 9, 2
2018-10-09
Isolation well doping with solid-state diffusion sources for FinFET architectures
Grant 10,090,304 - Jan , et al. October 2, 2
2018-10-02
Method For Fabricating A Local Interconnect In A Semiconductor Device
App 20180269213 - LAI; Jui-Yao ;   et al.
2018-09-20
Semiconductor device and a method for fabricating the same
Grant 10,056,407 - Shen , et al. August 21, 2
2018-08-21
Method for fabricating a local interconnect in a semiconductor device
Grant 9,997,522 - Lai , et al. June 12, 2
2018-06-12
Semiconductor Device And A Method For Fabricating The Same
App 20180138176 - SHEN; Hsiang-Ku ;   et al.
2018-05-17
Semiconductor device and manufacturing method thereof
Grant 9,947,594 - Yeh , et al. April 17, 2
2018-04-17
Semiconductor Device And Manufacturing Method Thereof
App 20180082908 - Yeh; Chih-Yang ;   et al.
2018-03-22
Semiconductor device and a method for fabricating the same
Grant 9,893,062 - Shen , et al. February 13, 2
2018-02-13
Self-aligned Contact And Manufacturing Method Thereof
App 20170365674 - Lee; Tung Ying ;   et al.
2017-12-21
Semiconductor Device And A Method For Fabricating The Same
App 20170317076 - SHEN; Hsiang-Ku ;   et al.
2017-11-02
Semiconductor Device And A Method For Fabricating The Same
App 20170256568 - SHEN; Hsiang-Ku ;   et al.
2017-09-07
Semiconductor Device And A Method For Fabricating The Same
App 20170186849 - CHEN; Hui-Chi ;   et al.
2017-06-29
Semiconductor Device And A Method For Fabricating The Same
App 20170186743 - CHIOU; Yao-De ;   et al.
2017-06-29
Method For Fabricating A Local Interconnect In A Semiconductor Device
App 20170162581 - LAI; Jui-Yao ;   et al.
2017-06-08
Doping With Solid-state Diffusion Sources For Finfet Architectures
App 20170125419 - Jan; Chia-Hong ;   et al.
2017-05-04
Isolation Well Doping With Solid-state Diffusion Sources For Finfet Architectures
App 20160211262 - JAN; CHIA-HONG ;   et al.
2016-07-21
Methods Of Integrating Multiple Gate Dielectric Transistors On A Tri-gate (finfet) Process
App 20160111426 - TSAI; Curtis ;   et al.
2016-04-21
Methods Of Integrating Multiple Gate Dielectric Transistors On A Tri-gate (finfet) Process
App 20140319623 - Tsai; Curtis ;   et al.
2014-10-30
Multi-gate Transistor With Strained Body
App 20090001415 - Lindert; Nick ;   et al.
2009-01-01

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed