Patent | Date |
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Process for forming a thin oxide layer Grant RE38,674 - Chau , et al. December 21, 2 | 2004-12-21 |
Transistor with ultra shallow tip and method of fabrication Grant 6,326,664 - Chau , et al. December 4, 2 | 2001-12-04 |
Transistor with low resistance tip and method of fabrication in a CMOS process Grant 6,165,826 - Chau , et al. December 26, 2 | 2000-12-26 |
Apparatus and a method for conditioning a semiconductor wafer polishing pad Grant 6,139,404 - Yau October 31, 2 | 2000-10-31 |
Capping layer in interconnect system and method for bonding the capping layer onto the interconnect system Grant 5,863,832 - Doyle , et al. January 26, 1 | 1999-01-26 |
Method of frabricating a MOS transistor having a composite gate electrode Grant 5,783,478 - Chau , et al. July 21, 1 | 1998-07-21 |
Transistor with ultra shallow tip and method of fabrication Grant 5,710,450 - Chau , et al. January 20, 1 | 1998-01-20 |
MOS transistor having a composite gate electrode and method of fabrication Grant 5,625,217 - Chau , et al. April 29, 1 | 1997-04-29 |
Method and apparatus for conditioning of chemical-mechanical polishing pads Grant 5,611,943 - Cadien , et al. March 18, 1 | 1997-03-18 |
Method and apparatus for endpoint detection in a chemical/mechanical process for polishing a substrate Grant 5,595,526 - Yau , et al. January 21, 1 | 1997-01-21 |
Orbital motion chemical-mechanical polishing apparatus and method of fabrication Grant 5,554,064 - Breivogel , et al. September 10, 1 | 1996-09-10 |
Inverted spacer transistor Grant 5,434,093 - Chau , et al. July 18, 1 | 1995-07-18 |
Process for forming a thin oxide layer Grant 5,244,843 - Chau , et al. September 14, 1 | 1993-09-14 |
Fabrication of interpoly dielctric for EPROM-related technologies Grant 5,104,819 - Freiberger , et al. April 14, 1 | 1992-04-14 |
Electrical contact apparatus for use with plasma or glow discharge reaction chamber Grant 4,917,044 - Yau , et al. April 17, 1 | 1990-04-17 |
Pulsed dual radio frequency CVD process Grant 4,837,185 - Yau , et al. June 6, 1 | 1989-06-06 |
Plasma enhanced chemical vapor deposited vertical silicon nitride resistor Grant 4,786,612 - Yau , et al. November 22, 1 | 1988-11-22 |
Method of making a silicon nitride resistor using plasma enhanced chemical vapor deposition Grant 4,755,480 - Yau , et al. July 5, 1 | 1988-07-05 |
Pattern delineation of vertical load resistor Grant 4,690,728 - Tsang , et al. September 1, 1 | 1987-09-01 |
MOS rear end processing Grant 4,620,986 - Yau , et al. November 4, 1 | 1986-11-04 |
MOS rear end processing Grant 4,587,138 - Yau , et al. May 6, 1 | 1986-05-06 |
Fabrication of small contact openings in large-scale-integrated devices Grant 4,136,434 - Thibault , et al. January 30, 1 | 1979-01-30 |