Yates; Colin D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yates; Colin D..The latest application filed is for "method of aligning nanotubes and wires with an etched feature".

Company Profile

0.6.5

Yates; Colin D. - Clackamas OR
Yates; Colin D. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of aligning nanotubes and wires with an etched feature Grant 8,343,373 - Yates January 1, 2	2013-01-01
Method of aligning deposited nanotubes onto an etched feature using a spacer Grant 7,858,979 - Yates , et al. December 28, 2	2010-12-28
Method Of Aligning Nanotubes And Wires With An Etched Feature App 20090314530 - YATES; Colin D.	2009-12-24
Method Of Aligning Deposited Nanotubes Onto An Etched Feature Using A Spacer App 20090243102 - Yates; Colin D. ; et al.	2009-10-01
Method of aligning nanotubes and wires with an etched feature Grant 7,575,693 - Yates , et al. August 18, 2	2009-08-18
Method of aligning deposited nanotubes onto an etched feature using a spacer Grant 7,541,216 - Yates , et al. June 2, 2	2009-06-02
Method of aligning deposited nanotubes onto an etched feature using a spacer App 20060281287 - Yates; Colin D. ; et al.	2006-12-14
Method of aligning nanotubes and wires with an etched feature App 20060264053 - Yates; Colin D.	2006-11-23
Reticle overlay correction Grant 7,016,041 - Yates , et al. March 21, 2	2006-03-21
Alignment process for integrated circuit structures on semiconductor substrate using scatterometry measurements of latent images in spaced apart test fields on substrate Grant 6,809,824 - Yates , et al. October 26, 2	2004-10-26
Reticle overlay correction App 20040046961 - Yates, Colin D. ; et al.	2004-03-11

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