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name:-0.016064167022705
name:-0.011584043502808
name:-0.015180110931396
Yastrebenetsky; Kolya Patent Filings

Yastrebenetsky; Kolya

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yastrebenetsky; Kolya.The latest application filed is for "memory cells having increased structural stability".

Company Profile
15.9.14
  • Yastrebenetsky; Kolya - Boise ID
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory Cells Having Increased Structural Stability
App 20220263019 - Aella; Pavan Kumar Reddy ;   et al.
2022-08-18
Memory cells having increased structural stability
Grant 11,367,833 - Aella , et al. June 21, 2
2022-06-21
Memory Cells With Asymmetrical Electrode Interfaces
App 20220059763 - Pirovano; Agostino ;   et al.
2022-02-24
Memory cells with asymmetrical electrode interfaces
Grant 11,133,463 - Pirovano , et al. September 28, 2
2021-09-28
Tapered Memory Cell Profiles
App 20210151673 - Pirovano; Agostino ;   et al.
2021-05-20
Tapered memory cell profiles
Grant 10,868,248 - Pirovano , et al. December 15, 2
2020-12-15
Memory Cells With Asymmetrical Electrode Interfaces
App 20200321522 - Pirovano; Agostino ;   et al.
2020-10-08
Memory Device With Double Protective Liner
App 20200286957 - Conti; Anna Maria ;   et al.
2020-09-10
Memory cells with asymmetrical electrode interfaces
Grant 10,672,981 - Pirovano , et al.
2020-06-02
Dual-layer dielectric in memory device
Grant 10,629,652 - Bernhardt , et al.
2020-04-21
Memory Cells With Asymmetrical Electrode Interfaces
App 20200119273 - Pirovano; Agostino ;   et al.
2020-04-16
Memory cells with asymmetrical electrode interfaces
Grant 10,541,364 - Pirovano , et al. Ja
2020-01-21
Tapered Memory Cell Profiles
App 20200020855 - Pirovano; Agostino ;   et al.
2020-01-16
Tapered memory cell profiles
Grant 10,424,730 - Pirovano , et al. Sept
2019-09-24
Tapered Memory Cell Profiles
App 20190252607 - Pirovano; Agostino ;   et al.
2019-08-15
Memory Cells With Asymmetrical Electrode Interfaces
App 20190252606 - Pirovano; Agostino ;   et al.
2019-08-15
Dual-layer Dielectric In Memory Device
App 20190206942 - Bernhardt; Michael J. ;   et al.
2019-07-04
Memory Cells Having Increased Structural Stability
App 20190044061 - Aella; Pavan Kumar Reddy ;   et al.
2019-02-07
Dual-layer dielectric in memory device
Grant 10,134,809 - Bernhardt , et al. November 20, 2
2018-11-20
Dual-layer Dielectric In Memory Device
App 20170271412 - Bernhardt; Michael J. ;   et al.
2017-09-21
Dual-layer dielectric in memory device
Grant 9,704,923 - Bernhardt , et al. July 11, 2
2017-07-11
Dual-layer dielectric in memory device
App 20170186815 - Bernhardt; Michael J. ;   et al.
2017-06-29

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