Yanofsky; Jared P.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yanofsky; Jared P..The latest application filed is for "chip carrier with dual-sided chip access and a method for testing a chip using the chip carrier".

Company Profile

0.4.4

Yanofsky; Jared P. - Somerville MA
Yanofsky; Jared P. - Burlington VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Determining thermal profiles of semiconductor structures Grant 9,638,581 - Clore , et al. May 2, 2	2017-05-02
Chip carrier with dual-sided chip access and a method for testing a chip using the chip carrier Grant 9,412,691 - Truax , et al. August 9, 2	2016-08-09
Chip Carrier With Dual-sided Chip Access And A Method For Testing A Chip Using The Chip Carrier App 20160163631 - Truax; Heather M. ; et al.	2016-06-09
Determining Thermal Profiles Of Semiconductor Structures App 20150362373 - Clore; Nicholas G. ; et al.	2015-12-17
Methods of localized hardening of dicing channel by applying localized heat in wafer kerf Grant 9,209,082 - Bausch , et al. December 8, 2	2015-12-08
Methods Of Localized Hardening Of Dicing Channel App 20150194346 - Bausch; Matthew G. ; et al.	2015-07-09
Microprocessor image correction and method for the detection of potential defects Grant 8,987,010 - Ayotte , et al. March 24, 2	2015-03-24
Microprocessor Image Correction And Method For The Detection Of Potential Defects App 20150064813 - AYOTTE; Stephen P. ; et al.	2015-03-05

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