Yang; Zusing

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yang; Zusing.The latest application filed is for "non-volatile memory with gate all around thin film transistor and method of manufacturing the same".

Company Profile

0.6.6

Yang; Zusing - Hsinchu TW
Yang; Zusing - Hsin-chu TW
YANG; ZUSING - Hsinchu City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Non-volatile memory with gate all around thin film transistor and method of manufacturing the same Grant 11,004,863 - Yang May 11, 2	2021-05-11
Non-volatile Memory With Gate All Around Thin Film Transistor And Method Of Manufacturing The Same App 20210066334 - YANG; ZUSING	2021-03-04
Composite hard mask etching profile for preventing pattern collapse in high-aspect-ratio trenches Grant 9,449,821 - Yang , et al. September 20, 2	2016-09-20
Method of forming copper sulfide film for reducing copper oxidization and loss Grant 9,337,036 - Yang , et al. May 10, 2	2016-05-10
Self-aligned liner method of avoiding PL gate damage Grant 9,287,285 - Hsu , et al. March 15, 2	2016-03-15
Composite Hard Mask Etching Profile for Preventing Pattern Collapse in High-Aspect-Ratio Trenches App 20160020211 - Yang; Zusing ; et al.	2016-01-21
Formation of a high aspect ratio contact hole Grant 9,224,803 - Yang , et al. December 29, 2	2015-12-29
Self-aligned Liner Method Of Avoiding Pl Gate Damage App 20150228661 - Hsu; Fang-Hao ; et al.	2015-08-13
Method of Forming Copper Sulfide Film for Reducing Cu Oxidization and Loss App 20150214054 - Yang; Zusing ; et al.	2015-07-30
Self-aligned liner method of avoiding PL gate damage Grant 9,012,282 - Hsu , et al. April 21, 2	2015-04-21
Self-aligned Liner Method Of Avoiding Pl Gate Damage App 20140264495 - HSU; FANG-HAO ; et al.	2014-09-18
Formation Of A High Aspect Ratio Contact Hole App 20140264782 - YANG; ZUSING ; et al.	2014-09-18

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