loadpatents
name:-0.03984808921814
name:-0.031821012496948
name:-0.0063419342041016
YANG; WU-DER Patent Filings

YANG; WU-DER

Patent Applications and Registrations

Patent applications and USPTO patent grants for YANG; WU-DER.The latest application filed is for "dual-die semiconductor package".

Company Profile
6.29.36
  • YANG; WU-DER - TAOYUAN CITY TW
  • Yang; Wu-Der - Taoyuan TW
  • Yang; Wu-der - Taoyuan County TW
  • Yang; Wu-Der - Tao-Yuan City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Dual-die Semiconductor Package
App 20220189927 - YANG; WU-DER ;   et al.		2022-06-16
Method For Manufacturing Semiconductor Die With Decoupling Capacitor
App 20220189959 - YANG; WU-DER		2022-06-16
Semiconductor package
Grant 11,348,893 - Yang May 31, 2		2022-05-31
Memory package structure
Grant 11,322,467 - Yang May 3, 2		2022-05-03
Electronic system, die assembly and device die
Grant 11,309,288 - Yang April 19, 2		2022-04-19
Method Of Testing With Ground Noise
App 20220101935 - Yang; Wu-Der		2022-03-31
Functional Test Equipment Including Relay System And Test Method Using The Functional Test Equipment
App 20220099732 - YANG; WU-DER		2022-03-31
Semiconductor Die With Decoupling Capacitor And Manufacturing Method Thereof
App 20220093602 - YANG; WU-DER		2022-03-24
Method For Preparing Semiconductor Package Having Multiple Voltage Supply Sources
App 20220059507 - YANG; WU-DER		2022-02-24
Ground bounce generator in device under test, automatic test equipment, and method of testing with ground noise
Grant 11,250,925 - Yang February 15, 2		2022-02-15
Semiconductor package and method of fabricating the same
Grant 11,239,220 - Yang February 1, 2		2022-02-01
Ground Bounce Generator In Device Under Test, Automatic Test Equipment, And Method Of Testing With Ground Noise
App 20220028473 - YANG; Wu-Der		2022-01-27
Electronic Module
App 20220020737 - YANG; Wu-Der		2022-01-20
Three-dimensional semiconductor package with partially overlapping chips and manufacturing method thereof
Grant 11,227,814 - Yang , et al. January 18, 2		2022-01-18
Semiconductor structure
Grant 11,222,839 - Yang January 11, 2		2022-01-11
Semiconductor package having multiple voltage supply sources and manufacturing method thereof
Grant 11,222,871 - Yang January 11, 2		2022-01-11
Semiconductor Package And Method Of Fabricating The Same
App 20210407972 - YANG; WU-DER		2021-12-30
Memory Package Structure
App 20210391288 - YANG; Wu-Der		2021-12-16
Semiconductor Package Device
App 20210391245 - YANG; Wu-Der		2021-12-16
Semiconductor Package
App 20210358878 - YANG; Wu-Der		2021-11-18
Semiconductor Package Having Multiple Voltage Supply Sources And Manufacturing Method Thereof
App 20210351162 - YANG; Wu-Der		2021-11-11
Semiconductor structure and manufacturing method thereof
Grant 11,158,586 - Hsieh , et al. October 26, 2		2021-10-26
Semiconductor Package
App 20210320085 - YANG; Wu-Der		2021-10-14
Electronic System, Die Assembly And Device Die
App 20210320084 - YANG; WU-DER		2021-10-14
Dual-die Semiconductor Package And Manufacturing Method Thereof
App 20210305210 - YANG; WU-DER ;   et al.		2021-09-30
Three-dimensional Semiconductor Package With Partially Overlapping Chips And Manufacturing Method Thereof
App 20210287967 - YANG; Wu-Der ;   et al.		2021-09-16
Semiconductor package including interconnection member and bonding wires and manufacturing method thereof
Grant 11,121,103 - Yang September 14, 2		2021-09-14
Semiconductor Package Including Interconnection Member And Bonding Wires And Manufacturing Method Thereof
App 20210280539 - YANG; Wu-Der		2021-09-09
Printed circuit board structure having pads and conductive wire
Grant 11,069,646 - Yang July 20, 2		2021-07-20
Semiconductor device
Grant 11,049,848 - Yang June 29, 2		2021-06-29
Redistribution Layer Structure And Semiconductor Package
App 20210143091 - Yang; Wu-Der		2021-05-13
Redistribution layer structure and semiconductor package
Grant 10,991,648 - Yang April 27, 2		2021-04-27
Chip-package Device
App 20210118838 - YANG; Wu-Der ;   et al.		2021-04-22
Semiconductor Package And Manufacturing Method Thereof
App 20210111145 - YANG; Wu-Der		2021-04-15
Semiconductor package and manufacturing method thereof
Grant 10,978,419 - Yang April 13, 2		2021-04-13
Printed Circuit Board Structure Having Pads And Conductive Wire
App 20210098413 - YANG; Wu-Der		2021-04-01
Semiconductor package and manufacturing method thereof
Grant 10,937,754 - Yang March 2, 2		2021-03-02
Semiconductor package and manufacturing method thereof
Grant 10,903,144 - Yang January 26, 2		2021-01-26
Semiconductor Structure And Manufacturing Method Thereof
App 20200211979 - HSIEH; Chang-Chun ;   et al.		2020-07-02
Housing assembly and memory device
Grant 10,062,620 - Hsu , et al. August 28, 2		2018-08-28
Stacked-type chip package structure and fabrication method thereof
Grant 8,338,929 - Chen , et al. December 25, 2		2012-12-25
Multi-chip stack package
Grant 8,022,523 - Chen , et al. September 20, 2		2011-09-20
Multi-chip Stack Package
App 20090250822 - Chen; Jen-Chun ;   et al.		2009-10-08
Stacked-type Chip Package Structure And Fabrication Method Thereof
App 20090146283 - Chen; Jen-Chun ;   et al.		2009-06-11
Fuse structure window
Grant 7,538,410 - Yang May 26, 2		2009-05-26
Package Device
App 20080135999 - Yang; Wu-Der		2008-06-12
Fuse structure window
App 20070023861 - Yang; Wu-Der		2007-02-01
Chip scale package socket for various package sizes
Grant 7,001,185 - Yang February 21, 2		2006-02-21
Fuse structure window
Grant 6,858,913 - Yang February 22, 2		2005-02-22
Double capacity stacked memory and fabrication method thereof
Grant 6,826,067 - Yang November 30, 2		2004-11-30
Fuse structure window
App 20040140524 - Yang, Wu-Der		2004-07-22
Fuse structure window
Grant 6,750,753 - Yang June 15, 2		2004-06-15
Method of quickly determining work line failure type
Grant 6,707,732 - Yang March 16, 2		2004-03-16
Double capacity stacked memory and fabrication method thereof
App 20040041259 - Yang, Wu-Der		2004-03-04
Fuse and fuse window structure
Grant 6,686,645 - Yang February 3, 2		2004-02-03
Fuse And Fuse Window Structure
App 20040016990 - Yang, Wu-Der		2004-01-29
Chip scale package socket
App 20040017666 - Yang, Wu-Der		2004-01-29
Fuse structure window
App 20040012476 - Yang, Wu-Der		2004-01-22
Fuse structure window
App 20040012072 - Yang, Wu-Der		2004-01-22
Fuse structure
Grant 6,667,535 - Yang December 23, 2		2003-12-23
Fuse structure
Grant 6,639,297 - Yang October 28, 2		2003-10-28
Method of quickly determining work line failure type
App 20030185063 - Yang, Wu-Der		2003-10-02
Fuse Structure
App 20030132503 - Yang, Wu-Der		2003-07-17
Fuse structure
App 20030122217 - Yang, Wu-Der		2003-07-03
Method for quickly identifying floating cells by a bit-line coupling pattern (BLCP)
Grant 6,115,834 - Jen , et al. September 5, 2		2000-09-05

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