Yang; Sheng Wei

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yang; Sheng Wei.The latest application filed is for "conductive line contact regions having multiple multi-direction conductive lines and staircase conductive line contact structures for semiconductor devices".

Company Profile

9.27.26

Yang; Sheng Wei - Boise ID
Yang; Sheng-Wei - Hsinchu TW
Yang; Sheng-Wei - Taoyuan TW
YANG; Sheng-Wei - Taoyuan City TW
Yang; Sheng-Wei - Taoyuan County TW
Yang; Sheng-Wei - Taipei TW
Yang; Sheng-Wei - Tainan Hsien TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor devices having crack-inhibiting structures Grant 11,444,037 - Chun , et al. September 13, 2	2022-09-13
Conductive Line Contact Regions Having Multiple Multi-direction Conductive Lines And Staircase Conductive Line Contact Structures For Semiconductor Devices App 20220108988 - Kim; Byung Yoon ; et al.	2022-04-07
Array Of Vertical Transistors And Method Used In Forming An Array Of Vertical Transistors App 20220028903 - Lee; Yi Fang ; et al.	2022-01-27
Semiconductor Devices Having Crack-inhibiting Structures App 20210020585 - Arifeen; Shams U. ; et al.	2021-01-21
User-defined rule engine Grant 10,891,410 - Hsu , et al. January 12, 2	2021-01-12
Semiconductor Devices Having Crack-inhibiting Structures App 20200402925 - Chun; Hyunsuk ; et al.	2020-12-24
Microelectronic devices including two contacts Grant 10,854,514 - Wu , et al. December 1, 2	2020-12-01
Semiconductor devices having crack-inhibiting structures Grant 10,811,365 - Arifeen , et al. October 20, 2	2020-10-20
Semiconductor devices having crack-inhibiting structures Grant 10,784,212 - Chun , et al. Sept	2020-09-22
Semiconductor Devices Having Crack-inhibiting Structures App 20200211983 - Chun; Hyunsuk ; et al.	2020-07-02
Semiconductor Devices Having Crack-inhibiting Structures App 20200211982 - Arifeen; Shams U. ; et al.	2020-07-02
Method for fabricating a memory device having two contacts Grant 10,388,564 - Wu , et al. A	2019-08-20
Microelectronic Devices Including Two Contacts App 20190252251 - Wu; Tieh-Chiang ; et al.	2019-08-15
Memory Device And Method For Fabricating The Same App 20170200722 - WU; Tieh-Chiang ; et al.	2017-07-13
Method for forming cell contact Grant 9,419,001 - Yang , et al. August 16, 2	2016-08-16
Semiconductor Devices Including Bulb-shaped Trenches App 20150340320 - Sapra; Sanjeev ; et al.	2015-11-26
Methods of forming bulb-shaped trenches in silicon Grant 9,117,759 - Sapra , et al. August 25, 2	2015-08-25
Single-sided access device and fabrication method thereof Grant 9,041,099 - Surthi , et al. May 26, 2	2015-05-26
Method for fabricating semiconductor device with vertical transistor structure Grant 9,012,303 - Yang , et al. April 21, 2	2015-04-21
Method For Fabricating Semiconductor Device App 20150037961 - Yang; Sheng-Wei ; et al.	2015-02-05
Vertical transistor in semiconductor device and method for fabricating the same Grant 8,901,631 - Yang , et al. December 2, 2	2014-12-02
Semiconductor Device And Method For Fabricating The Same App 20140252532 - Yang; Sheng-Wei ; et al.	2014-09-11
Method of fabricating memory device Grant 8,658,538 - Chuang , et al. February 25, 2	2014-02-25
Memory device and method of fabricating the same Grant 8,647,988 - Chuang , et al. February 11, 2	2014-02-11
Memory Device And Method Of Fabricating The Same App 20130183808 - CHUANG; YING CHENG ; et al.	2013-07-18
Method Of Fabricating Memory Device App 20130183809 - CHUANG; YING CHENG ; et al.	2013-07-18
Memory device and method of fabricating the same Grant 8,426,925 - Chuang , et al. April 23, 2	2013-04-23
Memory device and method of fabricating the same Grant 8,415,728 - Chuang , et al. April 9, 2	2013-04-09
Methods Of Forming Trenches In Silicon And A Semiconductor Device Including Same App 20130037919 - Sapra; Sanjeev ; et al.	2013-02-14
Methods of forming conductive contacts in the fabrication of integrated circuitry Grant 8,334,196 - Chuang , et al. December 18, 2	2012-12-18
Single-sided Access Device And Fabrication Method Thereof App 20120256259 - Surthi; Shyam ; et al.	2012-10-11
Memory Device And Method Of Fabricating The Same App 20120119276 - CHUANG; YING CHENG ; et al.	2012-05-17
Memory Device And Method Of Fabricating The Same App 20120119277 - CHUANG; YING CHENG ; et al.	2012-05-17
Methods Of Forming Conductive Contacts In The Fabrication Of Integrated Circuitry App 20120108047 - Chuang; Ying-Cheng ; et al.	2012-05-03
Method for isolation layer for a vertical DRAM Grant 7,074,700 - Huang , et al. July 11, 2	2006-07-11
Method for forming a self-aligned buried strap in a vertical memory cell Grant 6,962,847 - Huang , et al. November 8, 2	2005-11-08
Method for fabricating trench isolation Grant 6,958,283 - Liao , et al. October 25, 2	2005-10-25
Method for fabricating trench isolations with high aspect ratio Grant 6,946,359 - Yang , et al. September 20, 2	2005-09-20
Method for forming a self-aligned buried strap in a vertical memory cell Grant 6,927,123 - Huang , et al. August 9, 2	2005-08-09
Method For Forming A Self-aligned Buried Strap In A Vertical Memory Cell App 20050124110 - Huang, Cheng-Chih ; et al.	2005-06-09
Method for forming a self-aligned buried strap in a vertical memory cell App 20050124111 - Huang, Cheng-Chih ; et al.	2005-06-09
Process for planarizing array top oxide in vertical MOSFET DRAM arrays Grant 6,897,108 - Yang , et al. May 24, 2	2005-05-24
Method for isolation layer for a vertical DRAM App 20050064643 - Huang, Cheng-Chih ; et al.	2005-03-24
Method for fabricating trench isolations with high aspect ratio App 20050016948 - Yang, Sheng-Wei ; et al.	2005-01-27
Method for fabricating trench isolation App 20050020028 - Liao, Chien-Mao ; et al.	2005-01-27
Process For Planarizing Array Top Oxide In Vertical Mosfet Dram Arrays App 20050014331 - Yang, Sheng-Wei ; et al.	2005-01-20