Yang; Sheng-Hsing

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yang; Sheng-Hsing.The latest application filed is for "embedded multi-functional preprocessing input data buffer in radar system".

Company Profile

0.17.0

Yang; Sheng-Hsing - Hsinchu TW
Yang; Sheng-Hsing - Hsimchu TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Embedded multi-functional preprocessing input data buffer in radar system Grant 6,867,732 - Chen , et al. March 15, 2	2005-03-15
Electrostatic discharge protection circuit Grant 6,153,913 - Hsu , et al. November 28, 2	2000-11-28
Process for fabricating double well regions in semiconductor devices Grant 5,624,857 - Yang April 29, 1	1997-04-29
Method of fabricating junction termination extension structure for high-voltage diode devices Grant 5,614,421 - Yang March 25, 1	1997-03-25
Electrically programmable and erasable memory device with depression in lightly-doped source Grant 5,576,569 - Yang , et al. November 19, 1	1996-11-19
Method of fabricating a high-voltage metal-gate CMOS device Grant 5,523,246 - Yang June 4, 1	1996-06-04
Electrically erasable programmable memory device with improved erase and write operation Grant 5,514,890 - Yang , et al. May 7, 1	1996-05-07
Method of producing an LDMOS transistor having reduced dimensions, reduced leakage, and a reduced propensity to latch-up Grant 5,466,616 - Yang November 14, 1	1995-11-14
Method of fabricating a short-channel DMOS transistor with removable sidewall spacers Grant 5,444,002 - Yang August 22, 1	1995-08-22
VDMOS transistor and manufacturing method therefor Grant 5,442,214 - Yang August 15, 1	1995-08-15
Method for manufacturing a VDMOS transistor Grant 5,424,231 - Yang June 13, 1	1995-06-13
Process for fabricating high-voltage semiconductor power device Grant 5,422,286 - Yang June 6, 1	1995-06-06
Method of fabricating high voltage junction termination extension structure for a semiconductor integrated circuit device Grant 5,401,682 - Yang March 28, 1	1995-03-28
Method of producing VDMOS transistors Grant 5,395,777 - Yang March 7, 1	1995-03-07
Method of fabricating high voltage complementary metal oxide semiconductor transistors Grant 5,376,568 - Yang December 27, 1	1994-12-27
Method of making an electrically erasable programmable memory device with improved erase and write operation Grant 5,376,572 - Yang , et al. December 27, 1	1994-12-27
Method of fabricating lateral bipolar transistors Grant 5,360,750 - Yang November 1, 1	1994-11-01

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