name:-0.016314029693604
name:-0.017050981521606
name:-0.0041711330413818
Yang; Jianan Patent Filings

Yang; Jianan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yang; Jianan.The latest application filed is for "level shifter with deterministic output during power-up sequence".

Company Profile
3.23.18
  • Yang; Jianan - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks
Patent Activity
PatentDate
Level shifter with deterministic output during power-up sequence
Grant 10,855,261 - Yang , et al. December 1, 2
2020-12-01
Level Shifter With Deterministic Output During Power-up Sequence
App 20200136596 - YANG; Jianan ;   et al.
2020-04-30
Memory array with read only cells having multiple states and method of programming thereof
Grant 10,453,544 - Yang , et al. Oc
2019-10-22
Adaptable sense circuitry and method for read-only memory
Grant 9,899,069 - Yang February 20, 2
2018-02-20
Adaptable Sense Circuitry And Method For Read-only Memory
App 20180033472 - YANG; JIANAN
2018-02-01
Memory array with RAM and embedded ROM
Grant 9,691,495 - Yang , et al. June 27, 2
2017-06-27
Memory Array With Read Only Cells Having Multiple States And Method Of Programming Thereof
App 20160172052 - YANG; JIANAN ;   et al.
2016-06-16
Memory column drowsy control
Grant 9,317,087 - Ramaraju , et al. April 19, 2
2016-04-19
Memory Array With Ram And Embedded Rom
App 20160035433 - YANG; JIANAN ;   et al.
2016-02-04
Semiconductor device with single-event latch-up prevention circuitry
Grant 9,123,545 - Yang , et al. September 1, 2
2015-09-01
Memory with word level power gating
Grant 9,026,808 - Yang , et al. May 5, 2
2015-05-05
SRAM with embedded ROM
Grant 8,995,178 - Yang , et al. March 31, 2
2015-03-31
Method and apparatus for sensing on-chip characteristics
Grant 8,766,703 - Yang , et al. July 1, 2
2014-07-01
Semiconductor Device With Single-event Latch-up Prevention Circuitry
App 20140167102 - YANG; JIANAN ;   et al.
2014-06-19
Single event latch-up prevention techniques for a semiconductor device
Grant 8,685,800 - Yang , et al. April 1, 2
2014-04-01
Single-event Latch-up Prevention Techniques For A Semiconductor Device
App 20140027810 - Yang; Jianan ;   et al.
2014-01-30
Multi-threading flip-flop circuit
Grant 8,631,292 - Yang , et al. January 14, 2
2014-01-14
Integrated circuit having critical path voltage scaling and method therefor
Grant 8,575,962 - Yang , et al. November 5, 2
2013-11-05
Memory Column Drowsy Control
App 20130290753 - Ramaraju; Ravindraraj ;   et al.
2013-10-31
Memory With Word Level Power Gating
App 20130290750 - Yang; Jianan ;   et al.
2013-10-31
Reconfigurable engineering change order base cell
Grant 8,446,176 - Yang , et al. May 21, 2
2013-05-21
Multi-threading Flip-flop Circuit
App 20130049836 - Yang; Jianan ;   et al.
2013-02-28
Integrated Circuit Having Critical Path Voltage Scaling And Method Therefor
App 20130049807 - YANG; JIANAN ;   et al.
2013-02-28
Clocked single power supply level shifter
Grant 7,777,522 - Yang , et al. August 17, 2
2010-08-17
Clocked Single Power Supply Level Shifter
App 20100026343 - Yang; Jianan ;   et al.
2010-02-04
Two Transistor Tie Circuit With Body Biasing
App 20090302885 - YANG; JIANAN ;   et al.
2009-12-10

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