Patent | Date |
---|
Level Converting Enable Latch App 20220103175 - Hsu; Wei-Min ;   et al. | 2022-03-31 |
Processing circuit using delay element coupled between control terminal and connection terminal of input transistor for hold time violation immunity Grant 11,264,974 - Yang March 1, 2 | 2022-03-01 |
Processing Circuit Using Delay Element Coupled Between Control Terminal And Connection Terminal Of Input Transistor For Hold Time Violation Immunity App 20210297066 - Yang; Jen-Hang | 2021-09-23 |
Full adder circuits with reduced delay Grant 10,620,915 - Wei , et al. | 2020-04-14 |
Full Adder Circuits With Reduced Delay App 20200065065 - WEI; Ying-Chun ;   et al. | 2020-02-27 |
Cell layout utilizing boundary cell with mixed poly pitch within integrated circuit Grant 10,445,453 - Yang Oc | 2019-10-15 |
Scan output flip-flops Grant 10,361,686 - Hsieh , et al. | 2019-07-23 |
Integrated circuit Grant 10,297,587 - Yang | 2019-05-21 |
Scan Output Flip-flops App 20180375500 - HSIEH; Min-Hang ;   et al. | 2018-12-27 |
Integrated Circuit App 20170365594 - YANG; Jen-Hang | 2017-12-21 |
Integrated circuit Grant 9,786,645 - Yang October 10, 2 | 2017-10-10 |
Delay cell in a standard cell library Grant 9,705,484 - Wei , et al. July 11, 2 | 2017-07-11 |
Replacement method for scan cell of integrated circuit, skewable scan cell and integrated circuit Grant 9,536,031 - Liao , et al. January 3, 2 | 2017-01-03 |
Delay Cell In A Standard Cell Library App 20160380624 - WEI; Ying-Chun ;   et al. | 2016-12-29 |
Cell Layout Utilizing Boundary Cell With Mixed Poly Pitch Within Integrated Circuit App 20160300005 - Yang; Jen-Hang | 2016-10-13 |
Replacement Method For Scan Cell Of Integrated Circuit, Skewable Scan Cell And Integrated Circuit App 20160011258 - LIAO; Jen-Yi ;   et al. | 2016-01-14 |
Method for designing antenna cell that prevents plasma induced gate dielectric damage in semiconductor integrated circuits Grant 9,202,696 - Yang , et al. December 1, 2 | 2015-12-01 |
Integrated Circuit App 20150123730 - YANG; Jen-Hang | 2015-05-07 |
Method For Designing Antenna Cell That Prevents Plasma Induced Gate Dielectric Damage In Semiconductor Integrated Circuits App 20150031194 - YANG; Jen-Hang ;   et al. | 2015-01-29 |
Antenna cell design to prevent plasma induced gate dielectric damage in semiconductor integrated circuits Grant 8,872,269 - Yang , et al. October 28, 2 | 2014-10-28 |
Pulse generator Grant 8,552,785 - Kuo , et al. October 8, 2 | 2013-10-08 |
Method and apparatus for improved multiplexing using tri-state inverter Grant 8,482,314 - Chen , et al. July 9, 2 | 2013-07-09 |
Antenna Cell Design To Prevent Plasma Induced Gate Dielectric Damage In Semiconductor Integrated Circuits App 20130146981 - YANG; Jen-Hang ;   et al. | 2013-06-13 |
Pulse Generator App 20130113537 - KUO; Ming-Zhang ;   et al. | 2013-05-09 |
Method And Apparatus For Improved Multiplexing Using Tri-state Inverter App 20130113520 - CHEN; Chun-Fu ;   et al. | 2013-05-09 |
Reverse-biased PN diode decoupling capacitor Grant 7,550,820 - Chen , et al. June 23, 2 | 2009-06-23 |
Method for automatically modifying integrated circuit layout Grant 7,496,862 - Chang , et al. February 24, 2 | 2009-02-24 |
Reverse-biased PN diode decoupling capacitor App 20080122036 - Chen; Hsien-Te ;   et al. | 2008-05-29 |
Method for automatically modifying integrated circuit layout App 20080059916 - Chang; Mi-Chang ;   et al. | 2008-03-06 |