loadpatents
Patent applications and USPTO patent grants for Yang; Jean.The latest application filed is for "privacy verification tool".
Patent | Date |
---|---|
Privacy verification tool Grant 9,996,704 - Heise , et al. June 12, 2 | 2018-06-12 |
Method of manufacturing solar cell electrode Grant 9,246,027 - Ito , et al. January 26, 2 | 2016-01-26 |
Privacy Verification Tool App 20150310225 - Heise; Stephen Charles ;   et al. | 2015-10-29 |
Privacy verification tool Grant 9,009,780 - Heise , et al. April 14, 2 | 2015-04-14 |
Method Of Manufacturing Solar Cell Electrode App 20140352768 - ITO; KAZUSHIGE ;   et al. | 2014-12-04 |
Method Of Manufacturing Solar Cell Electrode App 20140352774 - ITO; KAZUSHIGE ;   et al. | 2014-12-04 |
Privacy Verification Tool App 20140282837 - Heise; Stephen Charles ;   et al. | 2014-09-18 |
Strapping contact for charge protection Grant 8,404,541 - Zheng , et al. March 26, 2 | 2013-03-26 |
Automated verification of a type-safe operating system Grant 8,341,602 - Hawblitzel , et al. December 25, 2 | 2012-12-25 |
3d Integrated Circuit System And Method App 20110272775 - KIM; Eunha ;   et al. | 2011-11-10 |
3-D integrated circuit system and method Grant 7,998,846 - Kim , et al. August 16, 2 | 2011-08-16 |
Strapping Contact For Charge Protection App 20100240210 - ZHENG; Wei ;   et al. | 2010-09-23 |
Automated Verification Of A Type-safe Operating System App 20100192130 - Hawblitzel; Chris ;   et al. | 2010-07-29 |
Strapping contact for charge protection Grant 7,750,407 - Zheng , et al. July 6, 2 | 2010-07-06 |
Method for improved planarization in semiconductor devices Grant 7,696,094 - Matsumoto , et al. April 13, 2 | 2010-04-13 |
3-d Integrated Circuit System And Method App 20100065940 - KIM; Eunha ;   et al. | 2010-03-18 |
Bit line implant Grant 7,432,178 - Hui , et al. October 7, 2 | 2008-10-07 |
Method For Improved Planarization In Semiconductor Devices App 20080160764 - MATSUMOTO; David ;   et al. | 2008-07-03 |
Strapping Contact For Charge Protection App 20080142889 - ZHENG; Wei ;   et al. | 2008-06-19 |
Void free interlayer dielectric Grant 7,307,027 - Ngo , et al. December 11, 2 | 2007-12-11 |
Bit line implant App 20070093042 - Hui; Angela T. ;   et al. | 2007-04-26 |
Reference cell with various load circuits compensating for source side loading effects in a non-volatile memory Grant 6,754,106 - Wu , et al. June 22, 2 | 2004-06-22 |
System and method for constructing a profile of a structure in an integrated circuit Grant 6,627,887 - Dudley , et al. September 30, 2 | 2003-09-30 |
Manufacture of semiconductor device with spacing narrower than lithography limit App 20030064585 - Wu, Yider ;   et al. | 2003-04-03 |
Shoe bottom Grant D460,249 - Yang | 2002-07-16 |
Nitrogen implant after bit-line formation for ONO flash memory devices Grant 6,403,420 - Yang , et al. June 11, 2 | 2002-06-11 |
Shoe bottom Grant D458,012 - Yang June 4, 2 | 2002-06-04 |
Method of forming ONO flash memory devices using rapid thermal oxidation Grant 6,395,654 - Yang , et al. May 28, 2 | 2002-05-28 |
Shoe bottom Grant D455,895 - Yang April 23, 2 | 2002-04-23 |
Algorithm for detecting sloped contact holes using a critical-dimension waveform App 20020000550 - Yang, Jean ;   et al. | 2002-01-03 |
Shoe upper Grant D448,550 - Yang October 2, 2 | 2001-10-02 |
Shoe upper Grant D446,922 - Yang August 28, 2 | 2001-08-28 |
Shoe upper Grant D446,639 - Yang August 21, 2 | 2001-08-21 |
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