name:-0.15468096733093
name:-0.18831706047058
name:-0.00319504737854
Yang; Amy Patent Filings

Yang; Amy

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yang; Amy.The latest application filed is for "systems and methods for in vivo dual recombinase-mediated cassette exchange (drmce) and disease models thereof".

Company Profile
2.8.11
  • Yang; Amy - Los Angeles CA
  • Yang; Amy - Beijing CN
  • Yang; Amy - Gilbert AZ
  • Yang; Amy - Saratoga CA
  • Yang; Amy - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks
Patent Activity
PatentDate
SYSTEMS AND METHODS FOR IN VIVO DUAL RECOMBINASE-MEDIATED CASSETTE EXCHANGE (dRMCE) AND DISEASE MODELS THEREOF
App 20220304286 - Breunig; Joshua ;   et al.
2022-09-29
Techniques For In-memory Stitching
App 20220300515 - Hsiao; Eric ;   et al.
2022-09-22
Techniques for in-memory stitching
Grant 11,386,094 - Hsiao , et al. July 12, 2
2022-07-12
Techniques For In-memory Stitching
App 20210109935 - Hsiao; Eric ;   et al.
2021-04-15
Techniques For Configuring Workflow Event Processing And Identifier Federation
App 20210110328 - Hsiao; Eric ;   et al.
2021-04-15
Apparatus and method for detection of contaminant particles or component defects
App 20060066846 - Chen; Ching-Too ;   et al.
2006-03-30
Patching technique for correction of minimum area and jog design rule violations
Grant 6,892,368 - Li , et al. May 10, 2
2005-05-10
Via enclosure rule check in a multi-wide object class design layout
Grant 6,883,149 - Li , et al. April 19, 2
2005-04-19
Structure and method for separating geometries in a design layout into multi-wide object classes
Grant 6,871,332 - Li , et al. March 22, 2
2005-03-22
Redundant via rule check in a multi-wide object class design layout
Grant 6,804,808 - Li , et al. October 12, 2
2004-10-12
Method to simplify and speed up design rule/electrical rule checks
Grant 6,769,099 - Li , et al. July 27, 2
2004-07-27
(Design rule check)/(electrical rule check) algorithms using a system resolution
Grant 6,735,749 - Li , et al. May 11, 2
2004-05-11
Via enclosure rule check in a multi-wide object class design layout
App 20040064795 - Li, Mu-Jing ;   et al.
2004-04-01
Redundant via rule check in a multi-wide object class design layout
App 20040063228 - Li, Mu-Jing ;   et al.
2004-04-01
Structure and method for separating geometries in a design layout into multi-wide object classes
App 20040019862 - Li, Mu-Jing ;   et al.
2004-01-29
Patching technique for correction of minimum area and jog design rule violations
App 20030229862 - Li, Mu-Jing ;   et al.
2003-12-11
Method to simplify and speed up design rule/electrical rule checks
App 20030196180 - Li, Mu-Jing ;   et al.
2003-10-16
(Design rule check)/(electrical rule check) algorithms using a system resolution
App 20030182644 - Li, Mu-Jing ;   et al.
2003-09-25
Multimedia stream incorporating interactive support for multiple types of subscriber terminals
Grant 6,578,201 - LaRocca , et al. June 10, 2
2003-06-10

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