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Patent applications and USPTO patent grants for YAMANAKA; Hidekazu.The latest application filed is for "bidirectional shift register and display device provided with same".
Patent | Date |
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Bidirectional Shift Register And Display Device Provided With Same App 20220246104 - SASAKI; Yasushi ;   et al. | 2022-08-04 |
Display device using binary driver having several holding circuits Grant 11,367,380 - Yamanaka , et al. June 21, 2 | 2022-06-21 |
Display Device App 20210335207 - YAMANAKA; HIDEKAZU ;   et al. | 2021-10-28 |
Tape-feeder Setting Work Apparatus App 20210307223 - YAMANAKA; Hidekazu ;   et al. | 2021-09-30 |
Active matrix substrate and display device Grant 11,036,106 - Kaise , et al. June 15, 2 | 2021-06-15 |
Active Matrix Substrate And Display Device App 20210141277 - KAISE; Yasuyoshi ;   et al. | 2021-05-13 |
Active matrix substrate and display panel Grant 10,847,109 - Adachi , et al. November 24, 2 | 2020-11-24 |
Shift register circuit Grant 10,706,803 - Furuta , et al. | 2020-07-07 |
Active Matrix Substrate And Display Panel App 20200168173 - ADACHI; Hiroyuki ;   et al. | 2020-05-28 |
Display Device App 20200126466 - HOSOYACHI; KOHEI ;   et al. | 2020-04-23 |
Display Device App 20190331974 - FURUTA; Shige ;   et al. | 2019-10-31 |
Shift register Grant 10,410,597 - Murakami , et al. Sept | 2019-09-10 |
Display Panel App 20190259349 - KAISE; Yasuyoshi ;   et al. | 2019-08-22 |
Display Device And Driver App 20190259347 - FURUTA; Shige ;   et al. | 2019-08-22 |
Shift register Grant 10,347,209 - Sasaki , et al. July 9, 2 | 2019-07-09 |
Drive Circuit Of Display Device App 20180149911 - YAMAGUCHI; TAKAHIRO ;   et al. | 2018-05-31 |
Shift Register Circuit App 20180144702 - FURUTA; SHIGE ;   et al. | 2018-05-24 |
Shift Register App 20180137831 - MURAKAMI; YUHICHIROH ;   et al. | 2018-05-17 |
Shift Register App 20180122320 - SASAKI; YASUSHI ;   et al. | 2018-05-03 |
Self-synchronous FIFO memory device Grant 7,463,640 - Muramatsu , et al. December 9, 2 | 2008-12-09 |
Data transfer control device and data-driven processor with the data transfer control device App 20050074035 - Yamanaka, Hidekazu ;   et al. | 2005-04-07 |
Self-synchronous logic circuit having test function and method of testing self-synchronous logic circuit Grant 6,819,140 - Yamanaka , et al. November 16, 2 | 2004-11-16 |
Self-synchronous FIFO memory device App 20040027909 - Muramatsu, Tsuyoshi ;   et al. | 2004-02-12 |
Self-synchronous logic circuit having test function and method of testing self-synchronous logic circuit App 20030226083 - Yamanaka, Hidekazu ;   et al. | 2003-12-04 |
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