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Patent applications and USPTO patent grants for Yamamura; Hisae.The latest application filed is for "method monitoring a quality of electronic circuits and its manufacturing condition and system for it".
Patent | Date |
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Method monitoring a quality of electronic circuits and its manufacturing condition and system for it Grant 6,622,054 - Okuda , et al. September 16, 2 | 2003-09-16 |
Defect judgement processing method and apparatus Grant 6,333,992 - Yamamura , et al. December 25, 2 | 2001-12-25 |
Method and apparatus for measuring the size of a circuit or wiring pattern formed on a hybrid integrated circuit chip and a wiring board respectively Grant 5,459,794 - Ninomiya , et al. October 17, 1 | 1995-10-17 |
Semiconductor memory device having redundancy memory cells for replacing defective Grant 5,373,471 - Saeki , et al. December 13, 1 | 1994-12-13 |
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