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name:-0.018410205841064
name:-0.021836042404175
name:-0.0096051692962646
Yamaguchi; Kensuke Patent Filings

Yamaguchi; Kensuke

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yamaguchi; Kensuke.The latest application filed is for "three-dimensional memory device including electrically conductive layers with molybdenum-containing liners".

Company Profile
9.16.17
  • Yamaguchi; Kensuke - Kuwana JP
  • Yamaguchi; Kensuke - Yokkaichi JP
  • Yamaguchi; Kensuke - Milpitas CA
  • Yamaguchi; Kensuke - Tokyo JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Three-dimensional memory device including electrically conductive layers with molybdenum-containing liners
Grant 10,916,504 - Mukae , et al. February 9, 2
2021-02-09
Three-dimensional Memory Device Including Electrically Conductive Layers With Molybdenum-containing Liners
App 20200395310 - MUKAE; Yusuke ;   et al.
2020-12-17
Three-dimensional memory device containing replacement contact via structures and method of making the same
Grant 10,608,010 - Terasawa , et al.
2020-03-31
Three-dimensional memory device containing offset column stairs and method of making the same
Grant 10,546,870 - Shimabukuro , et al. Ja
2020-01-28
Three-dimensional memory device and method of making the same using concurrent formation of memory openings and contact openings
Grant 10,490,569 - Mushiga , et al. Nov
2019-11-26
Three-dimensional Memory Device Containing Replacement Contact Via Structures And Method Of Making The Same
App 20190280001 - TERASAWA; Yujin ;   et al.
2019-09-12
Three-dimensional Memory Device And Method Of Making The Same Using Concurrent Formation Of Memory Openings And Contact Openings
App 20190280003 - Mushiga; Mitsuteru ;   et al.
2019-09-12
Three-dimensional Memory Device Containing Offset Column Stairs And Method Of Making The Same
App 20190221574 - SHIMABUKURO; Seiji ;   et al.
2019-07-18
Multi-tier memory device with through-stack peripheral contact via structures and method of making thereof
Grant 10,269,620 - Yu , et al.
2019-04-23
Within-array through-memory-level via structures and method of making thereof
Grant 10,249,640 - Yu , et al.
2019-04-02
Three-dimensional Memory Device Containing Support Pillars Underneath A Retro-stepped Dielectric Material And Method Of Making Thereof
App 20180342531 - Susuki; Hiromasa ;   et al.
2018-11-29
Three-dimensional memory device containing support pillars underneath a retro-stepped dielectric material and method of making thereof
Grant 10,141,331 - Susuki , et al. Nov
2018-11-27
Three-dimensional memory device with leakage reducing support pillar structures and method of making thereof
Grant 10,014,316 - Yu , et al. July 3, 2
2018-07-03
Bulb-shaped memory stack structures for direct source contact in three-dimensional memory device
Grant 10,008,570 - Yu , et al. June 26, 2
2018-06-26
Bulb-shaped Memory Stack Structures For Direct Source Contact In Three-dimensional Memory Device
App 20180122906 - YU; Jixin ;   et al.
2018-05-03
Three-dimensional Memory Device With Leakage Reducing Support Pillar Structures And Method Of Making Thereof
App 20180108671 - YU; Fabo ;   et al.
2018-04-19
Within-array Through-memory-level Via Structures And Method Of Making Thereof
App 20170358593 - YU; Jixin ;   et al.
2017-12-14
Method of selectively depositing floating gate material in a memory device
Grant 9,768,270 - Gunji-Yoneoka , et al. September 19, 2
2017-09-19
Multi-tier Memory Device With Through-stack Peripheral Contact Via Structures And Method Of Making Thereof
App 20170236746 - YU; Jixin ;   et al.
2017-08-17
Forming 3D memory cells after word line replacement
Grant 9,716,101 - Lu , et al. July 25, 2
2017-07-25
Blocking oxide in memory opening integration scheme for three-dimensional memory structure
Grant 9,601,508 - Sel , et al. March 21, 2
2017-03-21
Selective floating gate semiconductor material deposition in a three-dimensional memory structure
Grant 9,553,100 - Kamiya , et al. January 24, 2
2017-01-24
Memory Hole Last Boxim
App 20160343718 - Lu; Zhenyu ;   et al.
2016-11-24
Blocking Oxide In Memory Opening Integration Scheme For Three-dimensional Memory Structure
App 20160315095 - Sel; Jongsun ;   et al.
2016-10-27
Selective Floating Gate Semiconductor Material Deposition In A Three-dimensional Memory Structure
App 20160163725 - KAMIYA; Hiroyuki ;   et al.
2016-06-09
Bottom Recess Process For An Outer Blocking Dielectric Layer Inside A Memory Opening
App 20160111439 - Tsutsumi; Masanori ;   et al.
2016-04-21
Bottom recess process for an outer blocking dielectric layer inside a memory opening
Grant 9,305,937 - Tsutsumi , et al. April 5, 2
2016-04-05
Method Of Selectively Depositing Floating Gate Material In A Memory Device
App 20150380419 - GUNJI-YONEOKA; Marika ;   et al.
2015-12-31
Method For Forming Oxide Below Control Gate In Vertical Channel Thin Film Transistor
App 20150249143 - Sano; Michiaki ;   et al.
2015-09-03
Method for drying washed objects
Grant 6,901,685 - Yamaguchi , et al. June 7, 2
2005-06-07
Method for drying washed objects
App 20040226185 - Yamaguchi, Kensuke ;   et al.
2004-11-18
Apparatus and method for drying washed objects
Grant 6,779,534 - Yamaguchi , et al. August 24, 2
2004-08-24
Apparatus and method for drying washed objects
App 20030168086 - Yamaguchi, Kensuke ;   et al.
2003-09-11

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