loadpatents
name:-0.011839151382446
name:-0.0090489387512207
name:-0.00059795379638672
Yamagata; Satoru Patent Filings

Yamagata; Satoru

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yamagata; Satoru.The latest application filed is for "semiconductor memory device".

Company Profile
0.7.8
  • Yamagata; Satoru - Fukuyama JP
  • Yamagata; Satoru - Fukuyama-shi JP
  • Yamagata; Satoru - Hiroshima JP
  • Yamagata; Satoru - Tenri JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Transistor and transistor manufacturing method
Grant 7,560,775 - Takamura , et al. July 14, 2
2009-07-14
Semiconductor memory device
Grant 7,542,326 - Yoshimura , et al. June 2, 2
2009-06-02
Semiconductor memory device
Grant 7,511,985 - Horii , et al. March 31, 2
2009-03-31
Semiconductor memory device
Grant 7,511,986 - Horii , et al. March 31, 2
2009-03-31
Semiconductor memory device
App 20080049487 - Yoshimura; Satoshi ;   et al.
2008-02-28
Semiconductor memory device
App 20080025070 - Horii; Shinji ;   et al.
2008-01-31
Semiconductor memory device
App 20070285972 - Horii; Shinji ;   et al.
2007-12-13
Method for fabricating semiconductor device
Grant 7,276,407 - Yamagata , et al. October 2, 2
2007-10-02
Transistor and transistor manufacturing method
App 20070023792 - Takamura; Yoshiji ;   et al.
2007-02-01
Method for fabricating semiconductor device
App 20060063316 - Yamagata; Satoru ;   et al.
2006-03-23
Semiconductor memory device and production method therefor
App 20050141276 - Takeuchi, Noboru ;   et al.
2005-06-30
Method for manufacturing nonvolatile semiconductor memory with narrow variation in threshold voltages of memory cells
App 20040183120 - Yamagata, Satoru ;   et al.
2004-09-23
Method for manufacturing nonvolatile semiconductor memory with narrow variation in threshold voltages of memory cells
Grant 6,737,344 - Yamagata , et al. May 18, 2
2004-05-18
Method for manufacturing nonvolatile semiconductor memory with narrow variation in threshold voltages of memory cells
App 20020094638 - Yamagata, Satoru ;   et al.
2002-07-18
Manufacturing method of electrode
Grant 5,858,851 - Yamagata , et al. January 12, 1
1999-01-12

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