loadpatents
Patent applications and USPTO patent grants for Yagyu; Masayoshi.The latest application filed is for "wiring board and electronic device".
Patent | Date |
---|---|
Wiring board and electronic device Grant 11,229,115 - Chujo , et al. January 18, 2 | 2022-01-18 |
Semiconductor device Grant 10,763,214 - Kariyazaki , et al. Sep | 2020-09-01 |
Wiring Board and Electronic Device App 20200260570 - A1 | 2020-08-13 |
Semiconductor device Grant 10,541,216 - Nakagawa , et al. Ja | 2020-01-21 |
Semiconductor Device App 20190363050 - KARIYAZAKI; Shuuichi ;   et al. | 2019-11-28 |
Semiconductor Device App 20190198462 - NAKAGAWA; Kazuyuki ;   et al. | 2019-06-27 |
Low offset input circuit and transmission system with the input circuit Grant 8,358,708 - Takemoto , et al. January 22, 2 | 2013-01-22 |
Signal Wiring Board and Signal Transmission Circuit App 20120302075 - MURAOKA; Satoshi ;   et al. | 2012-11-29 |
Burst mode receiver Grant 8,284,872 - Sugawa , et al. October 9, 2 | 2012-10-09 |
Adjustment method, circuit, receiver circuit and transmission equipment of waveform equalization coefficient Grant 7,965,765 - Kanai , et al. June 21, 2 | 2011-06-21 |
Low-offset input circuit including amplifier circuit to correct circuit characteristics to cancel offset of the input circuit Grant 7,795,944 - Yagyu , et al. September 14, 2 | 2010-09-14 |
Logic circuit Grant 7,768,330 - Yuuki , et al. August 3, 2 | 2010-08-03 |
Burst Mode Receiver App 20100183107 - SUGAWA; Jun ;   et al. | 2010-07-22 |
Low offset input circuit and transmission system with the input circuit App 20090304092 - TAKEMOTO; Takashi ;   et al. | 2009-12-10 |
Low-offset Input Circuit App 20090085632 - YAGYU; Masayoshi ;   et al. | 2009-04-02 |
Logic circuit App 20080204100 - Yuuki; Fumio ;   et al. | 2008-08-28 |
Magnetic recording device Grant 7,417,818 - Yuuki , et al. August 26, 2 | 2008-08-26 |
Adjustment Method, Circuit, Receiver Circuit And Transmission Equipment Of Waveform Equalization Coefficient App 20080159460 - Kanai; Hisaaki ;   et al. | 2008-07-03 |
Signal transmission circuit, signal output circuit and termination method of signal transmission circuit Grant 7,373,114 - Yagyu , et al. May 13, 2 | 2008-05-13 |
Semiconductor device Grant 7,319,575 - Kawashimo , et al. January 15, 2 | 2008-01-15 |
Clock extracting fabric in a communication device Grant 7,277,643 - Baba , et al. October 2, 2 | 2007-10-02 |
Circuit board provided with digging depth detection structure and transmission device with the same mounted App 20070184687 - Kanai; Hisaaki ;   et al. | 2007-08-09 |
Magnetic recording device App 20060203372 - Yuuki; Fumio ;   et al. | 2006-09-14 |
Semiconductor device App 20060158802 - Kawashimo; Tatsuya ;   et al. | 2006-07-20 |
Semiconductor integrated circuit and magnetic storage device using the same Grant 7,046,468 - Yamashita , et al. May 16, 2 | 2006-05-16 |
Connection structure of high frequency lines and optical transmission module using the connection structure App 20060082422 - Yagyu; Masayoshi ;   et al. | 2006-04-20 |
Signal transmission circuit, signal output circuit and termination method of signal transmission circuit App 20050208902 - Yagyu, Masayoshi ;   et al. | 2005-09-22 |
Semiconductor integrated circuit and magnetic storage device using the same App 20050207228 - Yamashita, Hiroki ;   et al. | 2005-09-22 |
Connection structure of high frequency lines and optical transmission module using the connection structure App 20050174190 - Yagyu, Masayoshi ;   et al. | 2005-08-11 |
Clock extracting fabric in a communication device App 20040109476 - Baba, Takashige ;   et al. | 2004-06-10 |
Chip connection structure having diret through-hole connections through adhesive film and wiring substrate Grant 5,870,289 - Tokuda , et al. February 9, 1 | 1999-02-09 |
Information processing apparatus Grant 5,604,840 - Asai , et al. February 18, 1 | 1997-02-18 |
Information processing apparatus Grant 5,214,743 - Asai , et al. May 25, 1 | 1993-05-25 |
Clock signal supply system Grant 5,184,027 - Masuda , et al. February 2, 1 | 1993-02-02 |
Information processing system Grant 5,165,010 - Masuda , et al. November 17, 1 | 1992-11-17 |
Lead arrangement for reducing voltage variation Grant 4,748,494 - Yamada , et al. May 31, 1 | 1988-05-31 |
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