XU; Jiyin Patent Filings

Patent	Date
Method For Preparing Additive-free Cell-wall-broken Granule Of Chinese Medicinal Material App 20210030684 - CHENG; Jinle ; et al.	2021-02-04
Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the same Grant 10,777,570 - Nakamura , et al. Sept	2020-09-15
Multi-tier Three-dimensional Memory Devices Containing Annular Dielectric Spacers Within Memory Openings And Methods Of Making The Same App 20180277567 - Nakamura; Tadashi ; et al.	2018-09-27
Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the same Grant 9,991,280 - Nakamura , et al. June 5, 2	2018-06-05
Method of making three-dimensional semiconductor memory device having laterally undulating memory films Grant 9,978,768 - Xu , et al. May 22, 2	2018-05-22
Method Of Making Three-dimensional Semiconductor Memory Device Having Uniform Thickness Semiconductor Channel App 20180006041 - XU; Jiyin ; et al.	2018-01-04
Multi-tier Three-dimensional Memory Devices Containing Annular Dielectric Spacers Within Memory Openings And Methods Of Making The Same App 20170236835 - NAKAMURA; Tadashi ; et al.	2017-08-17
Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors Grant 9,543,318 - Lu , et al. January 10, 2	2017-01-10
Multi tier three-dimensional memory devices including vertically shared bit lines Grant 9,502,471 - Lu , et al. November 22, 2	2016-11-22
Three-dimensional memory device with stress compensation layer within a word line stack Grant 9,343,358 - Xu May 17, 2	2016-05-17

Patent

Date

Method For Preparing Additive-free Cell-wall-broken Granule Of Chinese Medicinal Material
App 20210030684 - CHENG; Jinle ; et al.

2021-02-04

Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the same
Grant 10,777,570 - Nakamura , et al. Sept

2020-09-15

Multi-tier Three-dimensional Memory Devices Containing Annular Dielectric Spacers Within Memory Openings And Methods Of Making The Same
App 20180277567 - Nakamura; Tadashi ; et al.

2018-09-27

Multi-tier three-dimensional memory devices containing annular dielectric spacers within memory openings and methods of making the same
Grant 9,991,280 - Nakamura , et al. June 5, 2

2018-06-05

Method of making three-dimensional semiconductor memory device having laterally undulating memory films
Grant 9,978,768 - Xu , et al. May 22, 2

2018-05-22

Method Of Making Three-dimensional Semiconductor Memory Device Having Uniform Thickness Semiconductor Channel
App 20180006041 - XU; Jiyin ; et al.

2018-01-04

Multi-tier Three-dimensional Memory Devices Containing Annular Dielectric Spacers Within Memory Openings And Methods Of Making The Same
App 20170236835 - NAKAMURA; Tadashi ; et al.

2017-08-17

Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors
Grant 9,543,318 - Lu , et al. January 10, 2

2017-01-10

Multi tier three-dimensional memory devices including vertically shared bit lines
Grant 9,502,471 - Lu , et al. November 22, 2

2016-11-22

Three-dimensional memory device with stress compensation layer within a word line stack
Grant 9,343,358 - Xu May 17, 2

2016-05-17

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