Xiao; De Yuan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Xiao; De Yuan.The latest application filed is for "hybrid integrated semiconductor tri-gate and split dual-gate finfet devices and method for manufacturing".

Company Profile

0.20.20

Xiao; De Yuan - Shanghai CN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Hybrid Integrated Semiconductor Tri-gate And Split Dual-gate Finfet Devices And Method For Manufacturing App 20180174909 - Xiao; De Yuan ; et al.	2018-06-21
Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing Grant 9,922,878 - Xiao , et al. March 20, 2	2018-03-20
FinFET device and fabrication method thereof Grant 9,853,026 - Xiao December 26, 2	2017-12-26
System and method for integrated circuits with cylindrical gate structures Grant 9,673,060 - Xiao , et al. June 6, 2	2017-06-06
System And Method For Integrated Circuits With Cylindrical Gate Structures App 20160260621 - XIAO; DE YUAN ; et al.	2016-09-08
Semiconductor device and fabrication method thereof Grant 9,437,709 - Xiao September 6, 2	2016-09-06
System and method for integrated circuits with cylindrical gate structures Grant 9,373,694 - Xiao , et al. June 21, 2	2016-06-21
Semiconductor Device And Fabrication Method Thereof App 20160149014 - XIAO; De Yuan	2016-05-26
Semiconductor device and fabrication method thereof Grant 9,269,772 - Xiao February 23, 2	2016-02-23
System and method for integrated circuits with cylindrical gate structures Grant 9,224,812 - Xiao , et al. December 29, 2	2015-12-29
Semiconductor device and fabrication method thereof Grant 9,209,289 - Xiao December 8, 2	2015-12-08
Transistor device and fabrication method Grant 9,136,183 - Xiao September 15, 2	2015-09-15
Three-dimensional Quantum Well Transistor App 20150214302 - XIAO; DE YUAN	2015-07-30
Three-dimensional quantum well transistor Grant 9,093,354 - Xiao July 28, 2	2015-07-28
Semiconductor Device And Manufacturing Method Thereof App 20150129926 - XIAO; De Yuan	2015-05-14
Three-dimensional quantum well transistor and fabrication method Grant 9,029,222 - Xiao May 12, 2	2015-05-12
Semiconductor Device And Fabrication Method Thereof App 20150034905 - XIAO; De Yuan	2015-02-05
Semiconductor Device And Fabrication Method Thereof App 20150034906 - XIAO; De Yuan	2015-02-05
System And Method For Integrated Circuits With Cylindrical Gate Structures App 20150024559 - XIAO; DE YUAN ; et al.	2015-01-22
Finfet Device And Fabrication Method Thereof App 20140353715 - XIAO; De Yuan	2014-12-04
Surrounding stacked gate multi-gate FET structure nonvolatile memory device Grant 8,889,510 - Xiao , et al. November 18, 2	2014-11-18
System and method for integrated circuits with cylindrical gate structures Grant 8,884,363 - Xiao , et al. November 11, 2	2014-11-11
Three-dimensional Quantum Well Transistor And Fabrication Method App 20140203243 - XIAO; DE YUAN	2014-07-24
Transistor And Fabriation Method App 20140193956 - XIAO; DE YUAN	2014-07-10
Surrounding Stacked Gate Multi-gate Fet Structure Nonvolatile Memory Device App 20130302951 - Xiao; De Yuan ; et al.	2013-11-14
Method and system for forming conductive bumping with copper interconnection Grant 8,581,366 - Xiao , et al. November 12, 2	2013-11-12
System And Method For Integrated Circuits With Cylindrical Gate Structures App 20130228833 - Xiao; De Yuan ; et al.	2013-09-05
3-D electrically programmable and erasable single-transistor non-volatile semiconductor memory device Grant 8,471,323 - Xiao , et al. June 25, 2	2013-06-25
Hybrid Integrated Semiconductor Tri-gate And Split Dual-gate Finfet Devices And Method For Manufacturing App 20130102116 - XIAO; DE YUAN ; et al.	2013-04-25
Method And System For Forming Conductive Bumping With Copper Interconnection App 20130029483 - XIAO; DE YUAN ; et al.	2013-01-31
Method and system for forming conductive bumping with copper interconnection Grant 8,293,635 - Xiao , et al. October 23, 2	2012-10-23
Method And System For Forming Conductive Bumping With Copper Interconnection App 20120088363 - XIAO; DE YUAN ; et al.	2012-04-12
System and method for integrated circuits with cylindrical gate structures App 20110291190 - Xiao; De Yuan ; et al.	2011-12-01
Method and system for forming conductive bumping with copper interconnection Grant 8,053,907 - Xiao , et al. November 8, 2	2011-11-08
3-d Electrically Programmable And Erasable Single-transistor Non-volatile Semiconductor Memory Device App 20110084327 - XIAO; DE YUAN ; et al.	2011-04-14
Method and System for Forming Conductive Bumping with Copper Interconnection App 20100013100 - Xiao; De Yuan ; et al.	2010-01-21

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