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Patent applications and USPTO patent grants for Xanthopoulos; Thucydides.The latest application filed is for "managing skew in data signals".
Patent | Date |
---|---|
Droop detection and mitigation Grant 11,402,413 - Mohan , et al. August 2, 2 | 2022-08-02 |
Clocking architecture for DVFS with low-frequency DLL locking Grant 10,784,871 - Xanthopoulos , et al. Sept | 2020-09-22 |
Glitch-free PLL Multiplexer Grant 10,530,370 - Mohan , et al. J | 2020-01-07 |
Method and apparatus for aligning signals Grant 9,721,627 - Xanthopoulos , et al. August 1, 2 | 2017-08-01 |
Managing skew in data signals Grant 9,570,128 - Lin , et al. February 14, 2 | 2017-02-14 |
Method and apparatus for power gating hardware components in a chip device Grant 9,483,100 - Carlson , et al. November 1, 2 | 2016-11-01 |
Managing Skew In Data Signals App 20160141012 - Lin; David ;   et al. | 2016-05-19 |
Memory interface with selectable evaluation modes Grant 9,263,151 - Xanthopoulos , et al. February 16, 2 | 2016-02-16 |
Method And Apparatus For Power Gating Hardware Components In A Chip Device App 20150248154 - Carlson; David A. ;   et al. | 2015-09-03 |
Method and Apparatus for Aligning Signals App 20150100815 - Xanthopoulos; Thucydides ;   et al. | 2015-04-09 |
Synchronized clock phase interpolator Grant 8,634,509 - Crain , et al. January 21, 2 | 2014-01-21 |
Synchronized Clock Phase Interpolator App 20120207259 - Crain; Ethan ;   et al. | 2012-08-16 |
Memory Interface With Selectable Evaluation Modes App 20120210179 - Xanthopoulos; Thucydides ;   et al. | 2012-08-16 |
Apparatus and method for data deskew Grant 7,209,531 - Katz , et al. April 24, 2 | 2007-04-24 |
Digital delay locked loop with wide dynamic range and fine precision App 20020079937 - Xanthopoulos, Thucydides | 2002-06-27 |
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