Wu; Tsung-Ching
Patent Applications and Registrations
Patent applications and USPTO patent grants for Wu; Tsung-Ching.The latest application filed is for "selecting memory cells".
- Wu; Tsung-Ching - Saratoga CA
- Wu; Tsung-Ching - Staratoga CA
- Wu; Tsung-Ching - San Jose CA
| Patent | Date |
|---|---|
| Memory device and systems and methods for selecting memory cells in the memory device Grant 9,595,335 - Wu , et al. March 14, 2 | 2017-03-14 |
| Selecting Memory Cells App 20160005477 - Wu; Tsung-Ching ; et al. | 2016-01-07 |
| Selecting memory cells using source lines Grant 9,142,306 - Wu , et al. September 22, 2 | 2015-09-22 |
| Two-layer sensor stack Grant 8,946,574 - Guard , et al. February 3, 2 | 2015-02-03 |
| Panel Grant 8,797,285 - Guard , et al. August 5, 2 | 2014-08-05 |
| Selecting Memory Cells App 20140198571 - Wu; Tsung-Ching ; et al. | 2014-07-17 |
| Touch Sensing Based On Signal Reflections App 20140132523 - Guard; David Brent ; et al. | 2014-05-15 |
| Panel App 20120262382 - Guard; David Brent ; et al. | 2012-10-18 |
| Touch Sensor with a Conductive Line Having Different Widths App 20120262412 - Guard; David Brent ; et al. | 2012-10-18 |
| Two-Layer Sensor Stack App 20120261242 - Guard; David Brent ; et al. | 2012-10-18 |
| Circuit to control voltage ramp rate Grant 7,848,151 - Chan , et al. December 7, 2 | 2010-12-07 |
| Circuit To Control Voltage Ramp Rate App 20090168586 - Chan; Johnny ; et al. | 2009-07-02 |
| Circuit to control voltage ramp rate Grant 7,512,008 - Chan , et al. March 31, 2 | 2009-03-31 |
| Circuit to control voltage ramp rate App 20070121382 - Chan; Johnny ; et al. | 2007-05-31 |
| Stress reduction for non-volatile memory cell Grant 5,434,815 - Smarandoiu , et al. July 18, 1 | 1995-07-18 |
| Fabrication process for programmable and erasable MOS memory device Grant 5,081,054 - Wu , et al. January 14, 1 | 1992-01-14 |
| Programmable and erasable MOS memory device Grant 5,066,992 - Wu , et al. November 19, 1 | 1991-11-19 |
| Sealed charge storage structure Grant 4,970,565 - Wu , et al. November 13, 1 | 1990-11-13 |
| EPROM fabrication process forming tub regions for high voltage devices Grant 4,859,619 - Wu , et al. August 22, 1 | 1989-08-22 |
| MOS floating gate memory cell containing tunneling diffusion region in contact with drain and extending under edges of field oxide Grant 4,822,750 - Perlegos , et al. April 18, 1 | 1989-04-18 |
| MOS floating gate memory cell and process for fabricating same Grant 4,701,776 - Perlegos , et al. October 20, 1 | 1987-10-20 |
| SEC | 0001237768 | WU TSUNG CHING |
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