Wu; Tie Jiang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wu; Tie Jiang.The latest application filed is for "misalignment test structure and method thereof".

Company Profile

0.15.13

Wu; Tie Jiang - Ilan TW
Wu; Tie-Jiang - Kueishan TW
Wu; Tie Jiang - Ilan Hsien TW
Wu; Tie-Jiang - Iian TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Device and method for detecting alignment of active areas and memory cell structures in DRAM devices Grant 7,381,575 - Wu , et al. June 3, 2	2008-06-03
Misalignment test structure and method thereof Grant 7,217,581 - Huang , et al. May 15, 2	2007-05-15
Misalignment test structure and method thereof App 20060128041 - Huang; Chien-Chang ; et al.	2006-06-15
Device and method for detecting alignment of active areas and memory cell structures in DRAM devices Grant 7,026,647 - Wu , et al. April 11, 2	2006-04-11
Misalignment test structure and method thereof Grant 7,015,050 - Huang , et al. March 21, 2	2006-03-21
Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal Grant 6,984,534 - Wu , et al. January 10, 2	2006-01-10
Test key for validating the position of a word line overlaying a trench capacitor in DRAMs Grant 6,946,678 - Wu , et al. September 20, 2	2005-09-20
Device and method for detecting alignment of active areas and memory cell structures in dram devices App 20050184289 - Wu, Tie Jiang ; et al.	2005-08-25
Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices Grant 6,902,942 - Wu , et al. June 7, 2	2005-06-07
Test structure of DRAM Grant 6,891,216 - Huang , et al. May 10, 2	2005-05-10
Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal Grant 6,844,207 - Wu , et al. January 18, 2	2005-01-18
Test key and method for validating the position of a word line overlaying a trench capacitor in DRAMs App 20050002221 - Wu, Tie Jiang ; et al.	2005-01-06
Device and method for detecting alignment of deep trench capacitors and active areas in DRAM devices Grant 6,838,296 - Wu , et al. January 4, 2	2005-01-04
Method for forming a crown capacitor App 20040241954 - Chen, Yi-Nan ; et al.	2004-12-02
Test key and method for validating the position of a word line overlaying a trench capacitor in DRAMS Grant 6,825,053 - Wu , et al. November 30, 2	2004-11-30
Test key and method for validating the doping concentration of buried layers within a deep trench capacitors Grant 6,812,487 - Wu , et al. November 2, 2	2004-11-02
Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices Grant 6,801,462 - Chang , et al. October 5, 2	2004-10-05
Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal App 20040179409 - Wu, Tie Jiang ; et al.	2004-09-16
Test key for detecting overlap between active area and deep trench capacitor of a DRAM and detection method thereof Grant 6,788,598 - Chang , et al. September 7, 2	2004-09-07
Misalignment test structure and method thereof App 20040124412 - Huang, Chien-Chang ; et al.	2004-07-01
Device and method for detecting alignment of active areas and memory cell structures in dram devices App 20040082087 - Wu, Tie Jiang ; et al.	2004-04-29
Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices App 20040076056 - Chang, Ming Cheng ; et al.	2004-04-22
Device and method for detecting alignment of deep trench capacitors and word lines in DRAM devices App 20040069989 - Wu, Tie Jiang ; et al.	2004-04-15
Device and method for detecting alignment of deep trench capacitors and active areas in DRAM devices App 20040033634 - Wu, Tie-Jiang ; et al.	2004-02-19
Test key and method for validating the position of a word line overlaying a trench capacitor in DRAMS App 20040031960 - Wu, Tie Jiang ; et al.	2004-02-19
Device and method for detecting alignment of bit lines and bit line contacts in DRAM devices Grant 6,693,834 - Wu , et al. February 17, 2	2004-02-17
Method and device for detecting whether the alignment of bit line contacts and active areas in DRAM devices is normal App 20040029301 - Wu, Tie Jiang ; et al.	2004-02-12
Test key for detecting overlap between active area and deep trench capacitor of a DRAM and detection method thereof App 20040017710 - Chang, Ming-Cheng ; et al.	2004-01-29

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