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name:-0.014402151107788
name:-0.00064992904663086
Wu; Schyi-yi Patent Filings

Wu; Schyi-yi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wu; Schyi-yi.The latest application filed is for "method for forming zener zap diodes and ohmic contacts in the same integrated circuit".

Company Profile
0.12.5
  • Wu; Schyi-yi - San Jose CA
  • Wu; Schyi-yi - Mesa AZ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method for forming zener zap diodes and ohmic contacts in the same integrated circuit
Grant 7,645,691 - Wu January 12, 2
2010-01-12
Method of manufacturing NPN device
Grant 7,572,707 - Wu August 11, 2
2009-08-11
Method for forming Zener Zap Diodes and Ohmic Contacts in the Same Integrated Circuit
App 20090093116 - Wu; Schyi-yi
2009-04-09
Vertical NPN Transistor Fabricated in a CMOS Process With Improved Electrical Characteristics
App 20090026578 - Wu; Schyi-yi ;   et al.
2009-01-29
Method for forming Schottky diodes and ohmic contacts in the same integrated circuit
Grant 7,479,444 - Wu January 20, 2
2009-01-20
Npn Device And Method Of Manufacturing The Same
App 20080290464 - Wu; Schyi-yi
2008-11-27
Method for forming Schottky Diodes and Ohmic Contacts in the Same Integrated Circuit
App 20070281451 - Wu; Schyi-yi
2007-12-06
Gate layouts for transistors
Grant 7,265,041 - Wu , et al. September 4, 2
2007-09-04
Gate layouts for transistors
App 20070138549 - Wu; Schyi-yi ;   et al.
2007-06-21
Ohmic contact for III-V semiconductor materials
Grant 5,430,327 - Wu , et al. July 4, 1
1995-07-04
Self-aligned complementary HFETS
Grant 5,411,903 - Wu , et al. May 2, 1
1995-05-02
Method of forming an ohmic contact to III-V semiconductor materials
Grant 5,275,971 - Wu , et al. January 4, 1
1994-01-04
Producing a plasma containing beryllium and beryllium fluoride
Grant 5,073,507 - Keller , et al. December 17, 1
1991-12-17
Complementary heterojunction field effect transistor with an anisotype N+ g a -channel devices
Grant 5,060,031 - Abrokwah , et al. October 22, 1
1991-10-22
Silicide to silicon bonding process
Grant 4,737,474 - Price , et al. April 12, 1
1988-04-12
Plasma enhanced CVD
Grant 4,692,343 - Price , et al. September 8, 1
1987-09-08
Method of forming a shallow and high conductivity boron doped layer in silicon
Grant 4,456,489 - Wu June 26, 1
1984-06-26

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