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Patent applications and USPTO patent grants for Wu; Jyun-Lin.The latest application filed is for "semiconductor structure and manufacturing method for the same".
Patent | Date |
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Semiconductor structure and manufacturing method for the same Grant 10,847,492 - Wu , et al. November 24, 2 | 2020-11-24 |
Semiconductor Structure And Manufacturing Method For The Same App 20190393186 - WU; Jyun-Lin ;   et al. | 2019-12-26 |
Integrated circuit with multi-level arrangement of e-fuse protected decoupling capacitors Grant 10,014,252 - Chang , et al. July 3, 2 | 2018-07-03 |
Semiconductor package structure with polymeric layer and manufacturing method thereof Grant 9,711,474 - Lu , et al. July 18, 2 | 2017-07-18 |
Capacitor With Fuse Protection App 20160315050 - Chang; Shih-Cheng ;   et al. | 2016-10-27 |
Methods for forming stacked capacitors with fuse protection Grant 9,385,079 - Chang , et al. July 5, 2 | 2016-07-05 |
Semiconductor Package Structure And Manufacturing Method Thereof App 20160086902 - LU; GIA-HER ;   et al. | 2016-03-24 |
Capacitor with Fuse Protection App 20150214150 - Chang; Shih-Cheng ;   et al. | 2015-07-30 |
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