loadpatents
name:-0.0081238746643066
name:-0.0085129737854004
name:-0.0049738883972168
Wu; Jiung Patent Filings

Wu; Jiung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wu; Jiung.The latest application filed is for "profile of through via protrusion in 3dic interconnect".

Company Profile
4.7.7
  • Wu; Jiung - Kueishan Shiang TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Profile of through via protrusion in 3DIC interconnect
Grant 11,004,741 - Wu , et al. May 11, 2
2021-05-11
Profile of Through Via Protrusion in 3DIC Interconnect
App 20200144119 - Wu; Jiung ;   et al.
2020-05-07
Profile of through via protrusion in 3DIC interconnect
Grant 10,566,237 - Wu , et al. Feb
2020-02-18
Profile of Through Via Protrusion in 3DIC Interconnect
App 20190122927 - Wu; Jiung ;   et al.
2019-04-25
Profile of through via protrusion in 3DIC interconnect
Grant 10,163,705 - Wu , et al. Dec
2018-12-25
Self-alignment for redistribution layer
Grant 10,074,595 - Yang , et al. September 11, 2
2018-09-11
Self-Alignment for Redistribution Layer
App 20180012825 - Yang; Ku-Feng ;   et al.
2018-01-11
Self-alignment for redistribution layer
Grant 9,786,580 - Yang , et al. October 10, 2
2017-10-10
Profile of Through Via Protrusion in 3DIC Interconnect
App 20150311141 - Wu; Jiung ;   et al.
2015-10-29
Self-alignment For Redistribution Layer
App 20150137382 - Yang; Ku-Feng ;   et al.
2015-05-21
Reducing substrate warpage in semiconductor processing
Grant 8,691,706 - Yu , et al. April 8, 2
2014-04-08
Reducing Substrate Warpage in Semiconductor Processing
App 20130183831 - Yu; Chen-Hua ;   et al.
2013-07-18

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